PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 146

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F8722 FAMILY
TABLE 11-7:
DS39646B-page 144
RD0/AD0/PSP0
RD1/AD1/PSP1
RD2/AD2/PSP2
RD3/AD3/PSP3
RD4/AD4/
PSP4/SDO2
Legend:
Note 1:
Pin Name
PWR = Power Supply, O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input,
TTL = TTL Buffer Input, x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Implemented on 80-pin devices only.
Function
PORTD FUNCTIONS
AD0
AD1
AD2
AD3
AD4
SDO2
PSP0
PSP1
PSP2
PSP3
PSP4
RD0
RD1
RD2
RD3
RD4
(1)
(1)
(1)
(1)
(1)
Setting
TRIS
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
1
x
x
x
x
0
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O Type
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
DIG
TTL
DIG
TTL
DIG
ST
ST
ST
ST
ST
Preliminary
LATD<0> data output.
PORTD<0> data input.
External memory interface, address/data bit 0 output. Takes priority
over PSP and port data.
External memory interface, data bit 0 input.
PSP read data output (LATD<0>). Takes priority over port data.
PSP write data input.
LATD<1> data output.
PORTD<1> data input.
External memory interface, address/data bit 1 output. Takes priority
over PSP and port data.
External memory interface, data bit 1 input.
PSP read data output (LATD<1>). Takes priority over port data.
PSP write data input.
LATD<2> data output.
PORTD<2> data input.
External memory interface, address/data bit 2 output. Takes priority
over PSP and port data.
External memory interface, data bit 2 input.
PSP read data output (LATD<2>). Takes priority over port data.
PSP write data input.
LATD<3> data output.
PORTD<3> data input.
External memory interface, address/data bit 3 output. Takes priority
over PSP and port data.
External memory interface, data bit 3 input.
PSP read data output (LATD<3>). Takes priority over port data.
PSP write data input.
LATD<4> data output.
PORTD<4> data input.
External memory interface, address/data bit 4 output. Takes priority
over PSP, MSSP and port data.
External memory interface, data bit 4 input.
PSP read data output (LATD<4>). Takes priority over port and PSP
data.
PSP write data input.
SPI™ data output (MSSP2 module). Takes priority over PSP and port
data.
Description
 2004 Microchip Technology Inc.