PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 295

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

24.2
The following steps are needed to set up the HLVD
module:
1.
2.
3.
4.
5.
24.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and will consume static
current. The total current consumption, when enabled,
is specified in electrical specification parameter D022B
(Section 28.2 “DC Characteristics”).
FIGURE 24-2:
 2004 Microchip Technology Inc.
Write the value to the HLVDL3:HLVDL0 bits that
selects the desired HLVD trip point.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1) or low voltage (VDIRMAG = 0).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD interrupt flag (PIR2<2>), which
may have been set from a previous interrupt.
Enable the HLVD interrupt if interrupts are
desired by setting the HLVDIE and GIE bits
(PIE2<2> and INTCON<7>). An interrupt will not
be generated until the IRVST bit is set.
CASE 1:
CASE 2:
Enable HLVD
Enable HLVD
HLVD Setup
Current Consumption
HLVDIF
HLVDIF
IRVST
IRVST
V
V
DD
DD
LOW-VOLTAGE DETECT OPERATION (VDIRMAG = 0)
Internal Reference is stable
Internal Reference is stable
Preliminary
T
T
IRVST
IRVST
HLVDIF may not be set
HLVDIF cleared in software,
HLVDIF remains set since HLVD condition still exists
Depending on the application, the HLVD module does
not need to be operating constantly. To decrease the
current requirements, the HLVD circuitry may only
need to be enabled for short periods where the voltage
is checked. After doing the check, the HLVD module
may be disabled.
24.4
The internal reference voltage of the HLVD module,
specified in electrical specification parameter D420
(Section 28.2 “DC Characteristics”), may be used
by other internal circuitry, such as the Programmable
Brown-out Reset. If the HLVD or other circuits using the
voltage reference are disabled to lower the device’s
current consumption, the reference voltage circuit will
require time to become stable before a low or
high-voltage condition can be reliably detected. This
start-up time, T
of device clock speed. It is specified in electrical
specification parameter 36 (Table 28-12).
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval. Refer to
Figure 24-2 or Figure 24-3.
PIC18F8722 FAMILY
HLVD Start-up Time
IRVST
HLVDIF cleared in software
, is an interval that is independent
HLVDIF cleared in software
V
V
DS39646B-page 293
HLVD
HLVD
IRVST
has