PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet
PIC18F6527-I/PT
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PIC18F6527-I/PT Summary of contents
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... PIC18F6527/6622/8527/8622 Rev. A1 Silicon Errata The PIC18F6527/6622/8527/8622 parts you have received conform functionally to the Device Data Sheet (DS39646B), except for the anomalies described below. Any Data Sheet Clarification issues related to the PIC18F6527/6622/8527/8622 devices will be reported in a separate Data Sheet errata. Please check the Microchip web site for any existing issues ...
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... PIC18F6527/6622/8527/8622 4. Module: EUSART In 9-Bit Asynchronous Full-Duplex Receive mode, received data may be corrupted if the TX9D bit (TXSTAx<0>) is not modified immediately after RCIDL (BAUDCONx<6>) is set. Work around Only write to TX9D when a reception is not in progress (RCIDL = 1). No interrupt is associated with RCIDL, therefore, it must be polled in software to determine when TX9D can be updated ...
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... TXREGx when timer is about to overflow. Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F6527/6622/8527/8622 12. Module: EUSART With the auto-wake-up option enabled by setting the WUE (BAUDCONx<1>) bit, the RCxIF bit will become set on a high-to-low transition on the RXx pin ...
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... PIC18F6527/6622/8527/8622 14. Module: MSSP (SPI Mode) In SPI mode, the Buffer Full Status bit, BF (SSPxSTAT<0>), should not be polled in software to determine when the transfer is complete. Work around Copy the SSPxSTAT register into a variable and perform the bit test on the variable. In Example 1, SSPxSTAT is copied into the working register ...
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... Date Codes that pertain to this issue: All engineering and production devices. © 2006 Microchip Technology Inc. PIC18F6527/6622/8527/8622 19. Module: ECCP (PWM Mode) When the PWM auto-shutdown feature is configured for automatic restart by setting the PxRSEN bit (ECCPxDEL<7>), the pulse may ter- minate immediately in a shutdown event ...
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... PIC18F6527/6622/8527/8622 22. Module: Reset This version of silicon does not support the func- tionality described in Note 1 of parameter D002 in Section 28.1 “DC Characteristics: Supply Voltage” of the data sheet. The RAM content may be altered during a Reset event if the following conditions are met. • Device is accessing RAM. ...
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... Memory Bus), 7 (MSSP), 8 (Timer1) and 9 (PORTE). Rev B Document (8/2006) Added silicon issues 10-12 (EUSART), 13-15 (MSSP – 2 SPI Mode), 16-18 (MSSP – Mode), 19-20 (ECCP – PWM Mode), 21 (CCP – PWM Mode), 22 (Reset) and 23 (External Memory Bus). © 2006 Microchip Technology Inc. PIC18F6527/6622/8527/8622 DS80253B-page 7 ...
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... PIC18F6527/6622/8527/8622 NOTES: DS80253B-page 8 © 2006 Microchip Technology Inc. ...
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... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2006 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-3910 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...