PIC18F6527-I/PT Microchip Technology, PIC18F6527-I/PT Datasheet - Page 432

• Manufacturer Part Number: PIC18F6527-I/PT
• Description: IC PIC MCU FLASH 24KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F6527-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (24K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 54
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3936 B
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT64PT5 - SOCKET TRAN ICE 64MQFP/TQFPAC164319 - MODULE SKT MPLAB PM3 64TQFPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F8722 FAMILY
C
C Compilers
CALL ................................................................................ 336
CALLW ............................................................................. 365
Capture (CCP Module) ..................................................... 181
Capture (ECCP Module) .................................................. 192
Capture/Compare/PWM (CCP) ........................................ 179
Clock Sources .................................................................... 37
CLRF ................................................................................ 337
CLRWDT .......................................................................... 337
Code Examples
Code Protection ............................................................... 297
COMF ............................................................................... 338
Comparator ...................................................................... 281
DS39646C-page 430
MPLAB C18 ............................................................. 372
MPLAB C30 ............................................................. 372
Associated Registers ............................................... 183
CCPRxH:CCPRxL Registers ................................... 181
CCPx Pin Configuration ........................................... 181
Prescaler .................................................................. 181
Software Interrupt .................................................... 181
Timer1/Timer3 Mode Selection ................................ 181
Capture Mode. See Capture.
CCP Mode and Timer Resources ............................ 180
CCPRxH Register .................................................... 180
CCPRxL Register ..................................................... 180
Compare Mode. See Compare.
Interconnect Configurations ..................................... 180
Module Configuration ............................................... 180
Selecting the 31 kHz Source ...................................... 38
Selection Using OSCCON Register ........................... 38
16 x 16 Signed Multiply Routine .............................. 118
16 x 16 Unsigned Multiply Routine .......................... 118
8 x 8 Signed Multiply Routine .................................. 117
8 x 8 Unsigned Multiply Routine .............................. 117
Changing Between Capture Prescalers ................... 181
Computed GOTO Using an Offset Value ................... 68
Data EEPROM Read ............................................... 113
Data EEPROM Refresh Routine .............................. 114
Data EEPROM Write ............................................... 113
Erasing a Flash Program Memory Row ..................... 92
Fast Register Stack .................................................... 68
How to Clear RAM (Bank 1) Using
Implementing a Real-Time Clock
Initializing PORTA .................................................... 135
Initializing PORTB .................................................... 137
Initializing PORTC .................................................... 140
Initializing PORTD .................................................... 143
Initializing PORTE .................................................... 146
Initializing PORTF .................................................... 149
Initializing PORTG ................................................... 151
Initializing PORTH .................................................... 154
Initializing PORTJ .................................................... 156
Loading the SSP1BUF (SSP1SR) Register ............. 208
Reading a Flash Program Memory Word .................. 91
Saving STATUS, WREG and BSR
Writing to Flash Program Memory ....................... 94–95
Analog Input Connection Considerations ................. 285
Associated Registers ............................................... 285
Configuration ............................................................ 282
Effects of a Reset ..................................................... 284
Interrupts .................................................................. 284
Indirect Addressing ............................................ 81
Using a Timer1 Interrupt Service ..................... 169
Registers in RAM ............................................. 134
Comparator Specifications ............................................... 394
Comparator Voltage Reference ....................................... 287
Comparator Voltage Reference Specifications ................ 394
Compare (CCP Module) .................................................. 182
Compare (CCP Modules)
Compare (ECCP Module) ................................................ 192
Compare (ECCP2 Module)
Computed GOTO ............................................................... 68
Configuration Bits ............................................................ 297
Configuration Register Protection .................................... 320
Context Saving During Interrupts ..................................... 134
Conversion Considerations .............................................. 426
CPFSEQ .......................................................................... 338
CPFSGT .......................................................................... 339
CPFSLT ........................................................................... 339
Crystal Oscillator/Ceramic Resonator ................................ 31
Customer Change Notification Service ............................ 439
Customer Notification Service ......................................... 439
Customer Support ............................................................ 439
D
Data Addressing Modes .................................................... 81
Data EEPROM
Data EEPROM Memory ................................................... 111
Operation ................................................................. 283
Operation During Sleep ........................................... 284
Outputs .................................................................... 283
Reference ................................................................ 283
Response Time ........................................................ 283
Accuracy and Error .................................................. 288
Associated Registers ............................................... 289
Configuring .............................................................. 287
Connection Considerations ...................................... 288
Effects of a Reset .................................................... 288
Operation During Sleep ........................................... 288
Associated Registers ............................................... 183
CCPRx Registers ..................................................... 182
Pin Configuration ..................................................... 182
Software Interrupt .................................................... 182
Special Event Trigger .............................................. 182
Timer1/Timer3 Mode Selection ................................ 182
Special Event Trigger .............................................. 175
Special Event Trigger .............................................. 192
Special Event Trigger .............................................. 280
Comparing Addressing Modes with the
Direct ......................................................................... 81
Indexed Literal Offset ................................................ 83
Indirect ....................................................................... 81
Inherent and Literal .................................................... 81
Code Protection ....................................................... 320
Associated Registers ............................................... 115
EEADR and EEADRH Registers ............................. 111
EECON1 and EECON2 Registers ........................... 111
Operation During Code-Protect ............................... 114
Protection Against Spurious Write ........................... 114
Reading ................................................................... 113
Using ....................................................................... 114
Write Verify .............................................................. 113
Writing ..................................................................... 113
External Signal ................................................ 283
Internal Signal .................................................. 283
Extended Instruction Set Enabled ..................... 84
Instructions Affected .......................................... 83
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