HW-SPAR3-SK-UNI-G Xilinx Inc, HW-SPAR3-SK-UNI-G Datasheet - Page 36

• Manufacturer Part Number: HW-SPAR3-SK-UNI-G
• Description: KIT STARTER SPARTAN-3
• Manufacturer: Xilinx Inc
• Series: Spartan-3r
• Type: FPGA Configurationr

Specifications of HW-SPAR3-SK-UNI-G

• Contents: Board, Cable, Software, Datasheets and User Manual
• For Use With/related Products: Spartan-3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1521

FPGA Configuration Modes and
Functions
FPGA Configuration Mode Settings
Table 9-1: Header J8 Controls the FPGA Configuration Mode
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
Master Serial
<0:0:0>
Slave Serial
<1:1:1>
Master Parallel
<1:1:0>
Configuration
<M0:M1:M2>
Mode
R
Header J8
Settings
M0 M1 M2
M0 M1 M2
M0 M1 M2
GND
GND
GND
In most applications for the Spartan
boots from the on-board Platform Flash memory whenever power is applied or the PROG
push button is pressed. However, the board supports all the available configuration modes
via the J8 header, indicated as
settings for the J8 header. Additionally, the JP1 jumper setting is required when using
Master Serial configuration mode, as further described in
(JP1).”
The default jumper settings for the board are:
•
•
J8
J8
J8
All jumpers in the J8 header are installed
The JP1 jumper is in the “Default” position
Jumper JP1
Setting
or
JP1
JP1
JP1
JP1
JP1
DEFAULT. The FPGA automatically boots from the Platform
Flash.
The FPGA attempts to boot from a serial configuration source
attached to either expansion connector A2 or B1.
Another device connected to either the A2 or B1 expansion
connector provides serial data and clock to load the FPGA.
The FPGA attempts to boot from a parallel configuration source
attached to the B1 expansion connector.
www.xilinx.com
16
in
®
-3 FPGA Starter Kit Board, the FPGA automatically
Figure
1-2.
Table 9-1
Description
“Platform Flash Jumper Options
provides the available option
Chapter 9
36