HW-SPAR3-SK-UNI-G Xilinx Inc, HW-SPAR3-SK-UNI-G Datasheet - Page 29

• Manufacturer Part Number: HW-SPAR3-SK-UNI-G
• Description: KIT STARTER SPARTAN-3
• Manufacturer: Xilinx Inc
• Series: Spartan-3r
• Type: FPGA Configurationr

Specifications of HW-SPAR3-SK-UNI-G

• Contents: Board, Cable, Software, Datasheets and User Manual
• For Use With/related Products: Spartan-3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1521

Keyboard
Table 6-3: Common PS/2 Keyboard Commands
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
Command
ESC
Caps Lock
` ~
0E
ED
76
EE
FE
FF
F3
TAB
Ctrl
0D
14
58
Shift
12
1 !
16
Turn on/off Num Lock, Caps Lock, and Scroll Lock LEDs. The keyboard acknowledges receipt of
an “ED” command by replying with an “FA”, after which the host sends another byte to set LED
status. The bit positions for the keyboard LEDs appear in
illuminate the associated keyboard LED.
Table 6-4: Keyboard LED Control
Echo. Upon receiving an echo command, the keyboard replies with the same scan code “EE”.
Set scan code repeat rate. The keyboard acknowledges receipt of an “F3” by returning an “FA”,
after which the host sends a second byte to set the repeat rate.
Resend. Upon receiving a resend command, the keyboard resends the last scan code sent.
Reset. Resets the keyboard.
15
Q
F1
1C
05
2 @
A
1E
1Z
7
Z
1D
W
Alt
11
1B
The host can also send data to the keyboard.
used commands.
The keyboard sends data to the host only when both the data and clock lines are High, the
Idle state.
Because the host is the “bus master”, the keyboard checks whether the host is sending data
before driving the bus. The clock line can be used as a “clear to send” signal. If the host
pulls the clock line Low, the keyboard must not send any data until the clock is released.
The keyboard sends data to the host in 11-bit words that contain a ‘0’ start bit, followed by
eight bits of scan code (LSB first), followed by an odd parity bit and terminated with a ‘1’
stop bit. When the keyboard sends data, it generates 11 clock transitions at around 20 to
30 kHz, and data is valid on the falling edge of the clock as shown in
F2
06
3 #
S
26
22
X
24
E
F3
04
23
D
6
4 $
25
21
C
2D
R
Figure 6-3: PS/2 Keyboard Scan Codes
0C
2B
F4
5 %
F
2E
Ignored
2A
V
2C
T
5
34
G
6 ^
36
32
B
F5
03
35
Y
Space
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33
7 &
H
29
3D
31
N
4
0B
F6
3C
U
3B
8 *
3E
J
Description
3A
M
F7
83
43
I
42
K
9 (
46
3
, <
41
0A
F8
44
O
Table 6-3
4B
L
0 )
45
Table
> .
49
Caps
Lock
4D
P
2
4C
F9
01
E0 11
; :
- _
4E
Alt
6-4. Write a ‘1’ to the specific bit to
provides a short list of some often-
4A
/ ?
[ {
54
F10
09
52
' "
= +
55
Num
Lock
1
5B
] }
F11
Back Space
78
Shift
59
Enter
5A
E0 14
Figure
66
Ctrl
5D
\ |
Scroll
F12
Lock
07
0
UG130_c6_03_042404
6-2.
E0 6B
E0 75
E0 74
E0 72
29
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