HW-SPAR3-SK-UNI-G Xilinx Inc, HW-SPAR3-SK-UNI-G Datasheet - Page 27

KIT STARTER SPARTAN-3

HW-SPAR3-SK-UNI-G

Manufacturer Part Number
HW-SPAR3-SK-UNI-G
Description
KIT STARTER SPARTAN-3
Manufacturer
Xilinx Inc
Series
Spartan-3r
Type
FPGA Configurationr
Datasheet

Specifications of HW-SPAR3-SK-UNI-G

Contents
Board, Cable, Software, Datasheets and User Manual
For Use With/related Products
Spartan-3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1521

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PS/2 Mouse/Keyboard Port
Spartan-3 FPGA Starter Kit Board User Guide
UG130 (v1.2) June 20, 2008
R
The Spartan
standard 6-pin mini-DIN connector, labeled J3 on the board and indicated as
Figure
connector. Only pins 1 and 5 of the connector attach to the FPGA. A detailed schematic
appears in
Table 6-1: PS/2 Connections to the Spartan-3 FPGA
Both a PC mouse and keyboard use the two-wire PS/2 serial bus to communicate with a
host device, the Spartan-3 FPGA in this case. The PS/2 bus includes both clock and data.
Both a mouse and keyboard drive the bus with identical signal timings and both use 11-bit
words that include a start, stop and odd parity bit. However, the data packets are
organized differently for a mouse and keyboard. Furthermore, the keyboard interface
allows bidirectional data transfers so the host device can illuminate state LEDs on the
keyboard.
The PS/2 bus timing appears
driven when data transfers occur, and otherwise they are held in the idle state at logic
High. The timings define signal requirements for mouse-to-host communications and
PS/2 DIN Pin
1-2.
Figure
Figure 6-1
1
2
3
4
5
6
®
-3 FPGA Starter Kit board includes a PS/2 mouse/keyboard port and the
A-7.
shows the PS/2 connector, and
www.xilinx.com
DATA (PS2D)
Reserved
GND
Voltage Supply
CLK (PS2C)
Reserved
Figure 6-1: PS/2 DIN Connector
Table 6-2
4
2
6
Signal
and
5
1
3
Figure
UG130_c6_01_042404
6-2. The clock and data signals are only
Table 6-1
shows the signals on the
Chapter 6
FPGA Pin
GND
M15
M16
9
in
27

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