DK-NIOS-2C35N Altera, DK-NIOS-2C35N Datasheet - Page 56

• Manufacturer Part Number: DK-NIOS-2C35N
• Description: NIOS II KIT W/CYCLONE II EP2C35N
• Manufacturer: Altera
• Series: Cyclone® IIr
• Type: Nios®IIr

Specifications of DK-NIOS-2C35N

• Contents: Eval Board, Design Apps, Software, Cables and Accessories
• For Use With/related Products: Cyclone ll 2C35N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1698; DK-NIOS-2C35N

Board Components
Power-Supply
Circuitry
2–44
Nios Development Board Cyclone II Edition
1.2V
1.2V
1.25V
1.25V
2.5V
3.3V
5V
+12V
-12V
Table 2–23. Power Supply and Fuse Details
Voltage
J30
TP12
TP10
TP9
TP11
J29
J28
J31
TP13
Pad
The Nios development board runs on a 16V, unregulated, input power
supply connected to J26. On-board circuitry generates +/-12V, +5V, +3.3V,
+2.5V, and +1.2V regulated power levels. For applications requiring high
current, separate voltage levels can be supplied from a workbench power
supply.
■
■
■
■
■
■
Table 2–23
points on the board.
F3
F7
F5
F4
F6
F2
F1
F8
F9
Fuse
The input power-supply on J26 can be either center-negative or
center-positive. A bridge rectifier (D34) presents the appropriate
polarity to the voltage regulators.
The 5V supply is presented on pin 2 of J12 and J15 for use by any
device plugged into the PROTO1 & PROTO2 expansion connectors.
The 3.3V supply is used as the power source for all FPGA I/O pins.
The 3.3V supply is also available for PROTO1 & PROTO2 daughter
cards.
The 2.5V supply is used only as the power supply for the DDR
SDRAM chip and is not available on any connector or header.
The 1.2V supply is used only as the power supply for the Cyclone II
device core (VCCINT) and it is not available on any connector or
header.
The +/-12V supply is provided for the PMC connectors JH1 and JH2.
Refer to
details. When workbench power supplies are connected to the board,
a corresponding fuse must be removed to decouple the on-board
voltage regulator. Each on-board regulator drives power through a
7A fuse. Refer to
lists the details of what voltage levels can be supplied to what
Core power for FPGA.
FPGA PLL power supply.
DDR SDRAM I/O VTT.
DDR SDRAM I/O VREF.
DDR SDRAM VDD power supply. FPGA VCCIO for pins that
interface to DDR SDRAM.
3.3V power for multiple components on the board.
5.0V power for multiple components on the board.
Power for the PMC connectors.
Power for the PMC connectors.
“PMC Connector (JH1 & JH2)” on page 2–26
Reference Manual
Table
2–23.
Note
Altera Corporation
for more
May 2007