DK-NIOS-2C35N Altera, DK-NIOS-2C35N Datasheet - Page 41

• Manufacturer Part Number: DK-NIOS-2C35N
• Description: NIOS II KIT W/CYCLONE II EP2C35N
• Manufacturer: Altera
• Series: Cyclone® IIr
• Type: Nios®IIr

Specifications of DK-NIOS-2C35N

• Contents: Eval Board, Design Apps, Software, Cables and Accessories
• For Use With/related Products: Cyclone ll 2C35N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-1698; DK-NIOS-2C35N

Mictor
Connector (J25)
Altera Corporation
May 2007
f
The Mictor connector (J25) can be used to transmit up to 27 high-speed
I/O signals with very low noise via a shielded Mictor cable. J25 can be
used as a debug port for the Nios II processor or as a general-purpose I/O
connector to the FPGA. Twenty five of the Mictor connector signals are
used as data, and two signals are used as clock input and clock output.
Most pins on J25 connect to I/O pins on the FPGA (U62). For systems that
do not use the Mictor connector for debugging the Nios II processor, any
on-chip signals can be routed to I/O pins and probed at J25. External
scopes and logic analyzers can connect to J25 and analyze a large number
of signals simultaneously.
For details on Nios II debugging products that use the Mictor connector,
see www.altera.com.
T20
W26
U24
U23
R25
P24
P23
M20
Y14
AA13
Y13
G22
N24
N23
M25
M24
N20
K26
K25
AE15
Table 2–15. PMC Connector Pin Table (Continued)
FPGA Pin
Reference Manual
43
13
39
42
37
38
36
4
5
6
9
13
33
35
25
16
17
40
47
64
JH1 & JH2 Pin
Nios Development Board Cyclone II Edition
JH1
JH1
JH2
JH2
JH1
JH2
JH1
JH1
JH1
JH1
JH1
JH2
JH1
JH2
JH2
JH1
JH1
JH1
JH2
JH1
Connector
pmc _par
pmc_clk
pmc_perr_n
pmc_serr_n
pmc_devsel_n
pmc_stop_n
pmc_irdy_n
pmc_inta_n
pmc_intb_n
pmc_intc_n
pmc_intd_n
pmc_reset_n
pmc_frame_n
pmc_trdy_n
pmc_idsel
pmc_gnt_n
pmc_req_n
pmc_lock_n
pmc_m66en
pmc_req64_n
Board Net Name
Board Components
2–29