E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 548

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 10 16-Bit Timer Pulse Unit (TPU)
Contention between TCNT Write and Overflow/Underflow
If there is an up-count or down-count in the T2 state of a TCNT write cycle, and
overflow/underflow occurs, the TCNT write takes precedence and the TCFV/TCFU flag in TSR is
not set.
Figure 10.57 shows the operation timing when there is contention between TCNT write and
overflow.
Multiplexing of I/O Pins
In the H8S/2655 Group, the TCLKA input pin is multiplexed with the TIOCC0 I/O pin, the
TCLKB input pin with the TIOCD0 I/O pin, the TCLKC input pin with the TIOCB1 I/O pin, and
the TCLKD input pin with the TIOCB2 I/O pin. When an external clock is input, compare match
output should not be performed from a multiplexed pin.
Interrupts and Module Stop Mode
If module stop mode is set when an interrupt has been requested, the CPU interrupt source or
DMAC/DTC activation source cannot be cleared. Interrupts should therefore be disabled before
setting module stop mode.
Rev. 5.00 Sep 14, 2006 page 518 of 1060
REJ09B0331-0500
Address
Write signal
TCNT
TCFV flag
Figure 10.57 Contention between TCNT Write and Overflow
H'FFFF
TCNT write cycle
T1
TCNT address
T2
M
TCNT write data