E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 27

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Section 16 A/D Converter
16.1 Overview........................................................................................................................... 679
16.2 Register Descriptions ........................................................................................................ 682
16.3 Interface to Bus Master ..................................................................................................... 688
16.4 Operation .......................................................................................................................... 690
16.5 Interrupts ........................................................................................................................... 706
16.6 Usage Notes ...................................................................................................................... 707
Section 17 D/A Converter
17.1 Overview........................................................................................................................... 709
17.2 Register Descriptions ........................................................................................................ 712
17.3 Operation .......................................................................................................................... 715
Section 18 RAM
18.1 Overview........................................................................................................................... 717
16.1.1 Features................................................................................................................ 679
16.1.2 Block Diagram ..................................................................................................... 680
16.1.3 Pin Configuration................................................................................................. 680
16.1.4 Register Configuration......................................................................................... 681
16.2.1 A/D Data Registers A to H (ADDRA to ADDRH).............................................. 682
16.2.2 A/D Control/Status Register (ADCSR) ............................................................... 683
16.2.3 A/D Control Register (ADCR) ............................................................................ 685
16.2.4 Module Stop Control Register (MSTPCR) .......................................................... 688
16.4.1 Select Single Mode .............................................................................................. 691
16.4.2 Select Scan Mode................................................................................................. 692
16.4.3 Group Single Mode.............................................................................................. 693
16.4.4 Group Scan Mode ................................................................................................ 694
16.4.5 Buffer Operation .................................................................................................. 695
16.4.6 Simultaneous Sampling Operation....................................................................... 698
16.4.7 Conversion Start Modes....................................................................................... 699
16.4.8 Starting Conversion by External Input................................................................. 702
16.4.9 A/D Conversion Time.......................................................................................... 703
17.1.1 Features................................................................................................................ 709
17.1.2 Block Diagram ..................................................................................................... 710
17.1.3 Pin Configuration................................................................................................. 711
17.1.4 Register Configuration......................................................................................... 711
17.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1) ................................................. 712
17.2.2 D/A Control Register (DACR) ............................................................................ 712
17.2.3 Module Stop Control Register (MSTPCR) .......................................................... 714
18.1.1 Block Diagram ..................................................................................................... 717
18.1.2 Register Configuration......................................................................................... 718
.................................................................................................................. 717
................................................................................................. 679
................................................................................................. 709
Rev. 5.00 Sep 14, 2006 page xxv of xxviii