E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 494
E62655RUSB
Manufacturer Part Number
E62655RUSB
Description
EMULATOR BASE H8S/2655R W/USB
Manufacturer
Renesas Electronics America
Type
Microcontrollerr
Datasheet
1.E62655RUSB.pdf
(1093 pages)
Specifications of E62655RUSB
Contents
E6000 Emulator Unit and 4 Logic Probes
For Use With/related Products
H8S/2655R
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 494 of 1093
- Download datasheet (6Mb)
Section 10 16-Bit Timer Pulse Unit (TPU)
10.2.8
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 5.
TSTR is initialized to H'00 by a reset, and in hardware standby mode.
When setting the operating mode in TMDR or the TCNT count clock in TCR, TCNT counter
operation should first be stopped.
Bits 7 and 6—Reserved: Should always be written with 0.
Bits 5 to 0—Counter Start 5 to 0 (CST5 to CST0): These bits select operation or stoppage for
TCNT.
Bit n
CSTn
0
1
Notes: 1. n = 5 to 0
Rev. 5.00 Sep 14, 2006 page 464 of 1060
REJ09B0331-0500
Bit
Initial value
R/W
2. If 0 is written to the CST bit during operation with the TIOC pin designated for output,
Timer Start Register (TSTR)
the counter stops but the TIOC pin output compare output level is retained. If TIOR is
written to when the CST bit is cleared to 0, the pin output level will be changed to the
set initial output value.
Description
TCNTn count operation is stopped
TCNTn performs count operation
:
:
:
—
—
7
0
—
—
6
0
CST5
R/W
5
0
CST4
R/W
4
0
CST3
R/W
3
0
CST2
R/W
2
0
CST1
R/W
1
0
(Initial value)
CST0
R/W
0
0
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