E62655RUSB Renesas Electronics America, E62655RUSB Datasheet - Page 1017

• Manufacturer Part Number: E62655RUSB
• Description: EMULATOR BASE H8S/2655R W/USB
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of E62655RUSB

• Contents: E6000 Emulator Unit and 4 Logic Probes
• For Use With/related Products: H8S/2655R
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

TCSR0—Timer Control/Status Register 0
TCSR1—Timer Control/Status Register 1
TCSR1
TCSR0
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note:
*
:
:
:
:
:
:
Only 0 can be written to bits 7 to 5, to clear these flags.
Compare Match Flag B
R/(W) *
R/(W) *
CMFB
CMFB
0
1
7
0
7
0
[Clearing conditions]
• Cleared by reading CMFB when CMFB = 1, then writing 0 to CMFB
• When the DTC is activated by a CMIB interrupt, while DISEL bit of MRB in DTC is 0.
[Setting condition]
Set when TCNT matches TCORB
Compare Match Flag A
R/(W) *
R/(W) *
CMFA
CMFA
0
1
6
0
6
0
[Clearing conditions]
• Cleared by reading CMFA when CMFA = 1, then writing 0 to CMFA
• When the DTC is activated by a CMIA interrupt, while DISEL bit of MRB in DTC is 0.
[Setting condition]
Set when TCNT matches TCORA
Timer Overflow Flag
R/(W) *
R/(W) *
OVF
OVF
0
1
5
0
5
0
[Clearing condition]
Cleared by reading OVF when OVF = 1, then writing 0 to OVF
[Setting condition]
Set when TCNT overflows (changes from H'FF to H'00)
A/D Trigger Enable (TCSR0 only)
ADTE
R/W
0
1
—
—
4
0
4
1
A/D converter start requests by compare match A are disabled
A/D converter start requests by compare match A are enabled
Output Select
OS3
R/W
OS3
R/W
3
0
3
0
0
1
H'FFB2
H'FFB3
Rev. 5.00 Sep 14, 2006 page 987 of 1060
0
1
0
1
OS2
R/W
OS2
R/W
2
0
2
0
No change when compare match B occurs
0 is output when compare match B occurs
1 is output when compare match B occurs
Output is inverted when compare match B occurs
(toggle output)
Output Select
0
1
Appendix B Internal I/O Register
0
1
0
1
OS1
R/W
OS1
R/W
1
0
1
0
No change when compare match A
occurs
0 is output when compare match A
occurs
1 is output when compare match A
occurs
Output is inverted when compare
match A occurs (toggle output)
OS0
OS0
R/W
R/W
8-Bit Timer Channel 0
8-Bit Timer Channel 1
0
0
0
0
REJ09B0331-0500