DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 15

KIT DESIGN CPLD W/BATT HOLDER

DO-CPLD-DK-G

Manufacturer Part Number
DO-CPLD-DK-G
Description
KIT DESIGN CPLD W/BATT HOLDER
Manufacturer
Xilinx Inc
Series
CoolRunner™- IIr
Type
CPLDr
Datasheets

Specifications of DO-CPLD-DK-G

Contents
Proto Board, Download Cable, Samples, Software
For Use With/related Products
CoolRunner-ll, XC9500XL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1512

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DO-CPLD-DK-G
Manufacturer:
XILINX
0
Field Programmable Gate Arrays (FPGAs)
Programmable Logic Design
June 12, 2006
R
In 1985, Xilinx introduced a completely new idea: combine the user control and time to
market of PLDs with the densities and cost benefits of gate arrays. Customers liked it, and
the FPGA was born. Today Xilinx is the number one FPGA vendor in the world.
An FPGA is a regular structure of logic cells (or modules) and interconnect, which is under
your complete control. This means that you can design, program, and make changes to
your circuit whenever you wish.
With FPGAs now exceeding the 10 million gate limit (the Xilinx Virtex™-4 FPGA is the
current record holder), you can really dream big. FPGAs feature:
With the introduction of the Spartan series of FPGAs, Xilinx can now compete with gate
arrays on all aspects – price, gate, and I/O count, as well as performance and cost.
There are two basic types of FPGAs: SRAM-based reprogrammable and OTP (One Time
Programmable). These two types of FPGAs differ in the implementation of the logic cell
and the mechanism used to make connections in the device.
if your design changes, you simply reprogram. By utilizing one device instead of
many, your board reliability will increase by only picking and placing one device
instead of many.
Reliability: Reliability can also be increased by using ultra-low-power CoolRunner
CPLDs. Their lower heat dissipation and lower power operation leads to
decreased FIT.
Channel based routing
Post layout timing
Tools more complex than CPLDs
Fine grained
Fast register pipelining
Data In
Clock
1
2
Logic
Logic
Logic
Logic
Logic
Cell
Cell
Cell
Cell
Cell
F=Z
www.xilinx.com
3
4
Figure 1-5: FPGA Architecture
Logic
Logic
Logic
Logic
Logic
F=Z
Cell
Cell
Cell
Cell
Cell
5
6
Logic
Logic
Logic
Logic
Logic
F=Z
Cell
Cell
Cell
Cell
Cell
7
Field Programmable Gate Arrays (FPGAs)
8
Logic
Logic
Logic
Logic
Logic
Cell
Cell
Cell
Cell
Cell
F=Z
10
9
Logic
Logic
Logic
Logic
Logic
Logic
Cell
Cell
Cell
Cell
Cell
Cell
Logic
Logic
Logic
Logic
Logic
Logic
Cell
Cell
Cell
Cell
Cell
Cell
12
11
Data Out
X10392
5

Related parts for DO-CPLD-DK-G