DO-CPLD-DK-G Xilinx Inc, DO-CPLD-DK-G Datasheet - Page 129

• Manufacturer Part Number: DO-CPLD-DK-G
• Description: KIT DESIGN CPLD W/BATT HOLDER
• Manufacturer: Xilinx Inc
• Series: CoolRunner™- IIr
• Type: CPLDr

Specifications of DO-CPLD-DK-G

• Contents: Proto Board, Download Cable, Samples, Software
• For Use With/related Products: CoolRunner-ll, XC9500XL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 122-1512

Programmable Logic Design
June 12, 2006
Design Partitioning
R
instruction taking as long as three cycles – the actual speed of a 20 MHz microcontroller is
divided by 6. This works out to an operational speed of only 3.33 MHz.
CoolRunner CPLDs are much, much faster than microcontrollers and can easily reach
system speeds in excess of 100 MHz. Today, we are even seeing CoolRunner devices with
input-to-output delays as short as 3.5 ns, which equates to impressive system speeds as
fast as 285 MHz. CoolRunner CPLDs make ideal partners for microcontrollers, because
they not only can perform high-speed tasks, they can perform those tasks with ultra- low
power consumption.
Xilinx offers free software and low-cost hardware design tools to support CPLD
integration with microcontrollers. The Xilinx CPLD design process is quite similar to that
used on microcontrollers, you can quickly learn how to partition your designs across a
CPLD and microcontroller to maximum advantage.
As we noted before, microcontrollers are very good at computational tasks, and CPLDs are
excellent in high-speed systems, with their abundance of I/Os.
can use a microcontroller and a CPLD in a partitioned design to achieve the greatest
control over a stepper motor.
Meanwhile, the UART and FIFO sections of the design can be implemented in the
microcontroller in the form of a microcontroller peripheral, or implemented in a larger,
more granular PLD such as an FPGA – for example, a Xilinx Spartan device. Using a PLD
in this design has the added benefit of gaining the ability to absorb any other discrete logic
elements on the PCB or in the total design into the CPLD. Under this new configuration,
we can consider the CPLD as offering hardware-based subroutines or as a mini co-
processor.
The microcontroller still performs ASCII string manipulation and mathematical functions,
but it now has more time to perform these operations – without interruption. The motor
control is now independently stable and safe.
Rx
Rx
Tx
Tx
Emergency Stop
Emergency Stop
if FPGA is used rather than CPLD
if FPGA is used rather than CPLD
Figure 7-2: Partitioned Design: Microcontroller and CPLD
UART
UART
UART
UART
Can be integrated as well
Can be integrated as well
Xilinx
Xilinx
Xilinx
CPU
CPU
CPU
www.xilinx.com
FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
FIFO
Interrupt
Interrupt
Comparator
Comparator
Comparator
Comparator
Byte
Byte
Byte
Byte
Register
Register
Register
Register
CoolRunner-II Application Examples
Speed and
Speed and
Speed and
Speed and
Direction
Direction
Direction
Direction
Counter
Counter
Control
Control
Counter
Counter
Control
Control
Table
7-2shows how we
M
M
Motor Position
Motor Position
Feedback
Feedback
Stepper Motor
Stepper Motor
360°
360°
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