MCIMX35WPDKJ Freescale Semiconductor, MCIMX35WPDKJ Datasheet - Page 122

• Manufacturer Part Number: MCIMX35WPDKJ
• Description: BOARD DEV FOR I.MX35
• Manufacturer: Freescale Semiconductor
• Series: i.MX35r
• Type: MPUr

Specifications of MCIMX35WPDKJ

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: i.MX35
• Processor Series: i.MX35
• Data Bus Width: 32 bit
• Interface Type: RS-232, Ethernet, USB, CAN, JTAG
• Core: ARM11
• For Use With/related Products: i.MX35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
2
4.9.23.1.12 UART Receiver
Figure 98
serial mode receive timing characteristics.
1
2
4.9.23.2
The following subsections give the UART transmit and receive timings in IrDA mode.
4.9.23.2.13 UART IrDA Mode Transmitter
Figure 99
the transmit timing characteristics.
122
F
T
The UART receiver can tolerate 1/(16 × F
exceed 3/(16 × F
F
(output)
ref_clk
baud_rate
baud_rate
UA1
UA2
TXD
ID
(input)
ID
RXD
: The period of UART reference clock ref_clk ( ipg_perclk after RFDIV divider).
: Baud rate frequency. The maximum baud rate the UART can support is ( ipg_perclk frequency)/16.
: Baud rate frequency. The maximum baud rate the UART can support is ( ipg_perclk frequency) ÷ 16.
depicts the RS-232 serial mode receive timing, with 8 data bit/1 stop bit format.
depicts the UART IrDA mode transmit timing, with 8 data bit/1 stop bit format.
Transmit Bit Time
UART IrDA Mode Timing
Start
Bit
baud_rate
Start
UA2
Bit
UA3
i.MX35 Applications Processors for Industrial and Consumer Products, Rev. 9
Figure 98. UART RS-232 Serial Mode Receive Timing Diagram
Bit 0
Receive Bit Time
).
Bit 0
Table 79. RS-232 Serial Mode Transmit Timing Parameters
Table 80. RS-232 Serial Mode Receive Timing Parameters
Parameter
Parameter
Figure 99. UART IrDA Mode Transmit Timing Diagram
Bit 1
Bit 1
baud_rate
1
Bit 2
Bit 2
UA3
) tolerance in each bit. But accumulation tolerance in one frame must not
UA2
Bit 3
Bit 3
Bit 4
Symbol
Symbol
t
t
Rbit
Tbit
Bit 4
Bit 5
1/(16 × F
1/F
1/F
Bit 6
UA4
baud_rate
baud_rate
T
Bit 5
ref_clk
Min.
Min.
baud_rate
2
Bit 7
1
2
–
–
Bit 6
)
Possible
Par Bit
Parity
UA2
1/(16 × F
Bit
1/F
1/F
Bit 7
baud_rate
baud_rate
T
STOP
Max.
Max.
Freescale Semiconductor
ref_clk
UA2
BIT
UA3
baud_rate
Possible
+
Parity
+
Table 81
Table 80
Bit
Next
Start
Bit
)
UA3
Units
Units
STOP
—
—
BIT
lists
lists