DK-DEV-3CLS200N Altera, DK-DEV-3CLS200N Datasheet - Page 39

KIT DEV CYCLONE III LS EP3CLS200

DK-DEV-3CLS200N

Manufacturer Part Number
DK-DEV-3CLS200N
Description
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-DEV-3CLS200N

Contents
Board
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III LS
Rohs Compliant
Yes
For Use With/related Products
EP3CLS200
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2601
Appendix A: Programming the Flash Memory Device
Restoring the MAX II CPLD to the Factory Settings
Restoring the MAX II CPLD to the Factory Settings
© October 2009 Altera Corporation
f
f
12. Cycle the POWER switch (SW1) off then on to load and run the restored factory
13. The restore script cannot restore the board’s MAC address automatically. In the
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
This section describes how to restore the original factory contents to the MAX II CPLD
on the development board. Make sure you have the Nios II EDS installed, and
perform the following instructions:
1. Set the board switches to the factory default settings described in
2. Launch the Quartus II Programmer.
3. Click Auto Detect.
4. Click Add File and select <install
5. Turn on the Program/Configure option for the added file.
6. Click Start to download the selected configuration file to the MAX II CPLD.
To ensure that you have the most up-to-date factory restore files and information
about this product, refer to the
Altera website.
design.
Nios II command shell, type the following Nios II EDS command:
nios2-terminal r
and follow the instructions in the terminal window to generate a unique MAC
address.
Switch Settings” on page
1
dir>\kits\cycloneIIILS_3cls200_fpga\factory_recovery\max2.pof.
Configuration is complete when the progress bar reaches 100%.
Installing the shunt jumper on jumper J11 pins 1-2 includes the MAX II
device in the JTAG chain. Installing the shunt jumper on jumper J12 or
setting DIP switch SW2.3 to the off position breaks the JTAG chain.
4–2.
Altera Development Kits
Cyclone III LS FPGA Development Kit
Cyclone III LS FPGA Development Kit User Guide
page on the Altera website.
“Factory Default
page on the
A–5

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