DK-DEV-3CLS200N Altera, DK-DEV-3CLS200N Datasheet - Page 26

• Manufacturer Part Number: DK-DEV-3CLS200N
• Description: KIT DEV CYCLONE III LS EP3CLS200
• Manufacturer: Altera
• Series: Cyclone® IIIr
• Type: FPGAr

Specifications of DK-DEV-3CLS200N

• Contents: Board
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Cyclone
• Silicon Core Number: EP3C
• Silicon Family Name: Cyclone III LS
• Rohs Compliant: Yes
• For Use With/related Products: EP3CLS200
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2601

6–8
The SRAM&Flash Tab
Figure 6–4. The SRAM&Flash Tab
Cyclone III LS FPGA Development Kit User Guide
Pushbutton Switches
This read-only control displays the current state of the board user push buttons. Press
a push button on the board to see the graphical display change accordingly.
The SRAM&Flash tab allows you to read and write SRAM and flash memory on your
board.
The following sections describe the controls on the SRAM&Flash tab.
SRAM
This control allows you to read and write the SRAM on your board. Type a starting
address in the text box and click Read. Values starting at the specified address appear
in the table.The base address of SRAM in this Nios II-based BTS design is
0x0D00.0000. The valid address range within the 2-MByte SRAM is 0x0000.0000
through 0x001F.FFFF, as shown in the GUI.
Figure 6–4
shows the SRAM&Flash tab.
© October 2009 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System