DK-DEV-3CLS200N Altera, DK-DEV-3CLS200N Datasheet - Page 32

KIT DEV CYCLONE III LS EP3CLS200

DK-DEV-3CLS200N

Manufacturer Part Number
DK-DEV-3CLS200N
Description
KIT DEV CYCLONE III LS EP3CLS200
Manufacturer
Altera
Series
Cyclone® IIIr
Type
FPGAr

Specifications of DK-DEV-3CLS200N

Contents
Board
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Cyclone
Silicon Core Number
EP3C
Silicon Family Name
Cyclone III LS
Rohs Compliant
Yes
For Use With/related Products
EP3CLS200
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2601
6–14
Cyclone III LS FPGA Development Kit User Guide
1
You can also run the Power Monitor as a stand-alone application. PowerTool.exe
resides in the <install
dir>\kits\cycloneIIILS_3cls200_fpga\examples\board_test_system directory. On
Windows, click Start > All Programs > Altera > Cyclone III LS FPGA Development
Kit <version> > Power Monitor to start the application.
The Power Monitor communicates to the MAX II device on the board through the
JTAG bus. A power monitor circuit attached to the MAX II device allows you to
measure the power that the Cyclone III LS FPGA device is consuming regardless of
the design currently running.
Figure 6–7. The Power Monitor
The following sections describe the Power Monitor controls.
MAX II Information
These controls display information about the MAX II device.
MAX II Version—Indicates the version of MAX II code currently running on the
board. The MAX II code resides in the <install
dir>\kits\cycloneIIILS_3cls200_fpga\factory_recovery directory. Newer revisions
of this code might be available on the
the Altera website.
Figure 6–7
Cyclone III LS FPGA Development Kit
shows the Power Monitor.
© October 2009 Altera Corporation
Chapter 6: Board Test System
The Power Monitor
page of

Related parts for DK-DEV-3CLS200N