STEVAL-IFS012V1 STMicroelectronics, STEVAL-IFS012V1 Datasheet - Page 33

• Manufacturer Part Number: STEVAL-IFS012V1
• Description: BOARD ST72651AR6/STTS75/STLM20
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS012V1

• Sensor Type: Temperature
• Sensing Range: Depends on IC
• Interface: I²C, USB
• Sensitivity: Depends on IC
• Voltage - Supply: 5V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST72F651AR6, STTS75, STLM20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8419

POWER SUPPLY MANAGEMENT (Cont’d)
6.4.2.2 Switching from USB Mode to Stand-
Alone Mode
In USB Mode, when the user unplugs the USB ca-
ble, the voltage level drops on the USBV
The on-chip Power Supply Manager generates a
PLG interrupt when USBV
The user program then can finish the current
processing, and MUST generate a software RE-
SET.
Caution: Care should be taken as during this peri-
od the microcontroller clock is provided from the
PLL output. Functionality in this mode is not guar-
anteed for voltages below V
Caution: When the V
a voltage higher than the detector thresholds, the
USBV
tection diode between V
configuration, the detector will not detect a voltage
drop and can not be used.
Software must ensure that the software RESET is
generated before V
ing to do this will cause the clock circuitry to stop,
freezing the microcontroller operations.
DD
voltage continues to be driven by the pro-
DD
DDF
. drops below V
DDF
is supplied externally by
DD
PLLmin
and USBV
reaches USBV
.
PLLmin
DD
DD
. In this
Doc ID 7215 Rev 4
. Fail-
line.
IT-
.
Once the user program has executed the software
reset, the microcontroller goes into reset state and
all I/O ports go into floating input mode.
During and after this (software induced) reset
phase, the USBEN pin is put in high impedance by
hardware. It causes the USB SWITCH to be
turned OFF, so USBV
V
ternal frequency is provided by a division of the
crystal frequency. Refer to
The microcontroller is still powered by the residual
USBV
set output level). This V
ing the reset phase until it reaches the step-up
converter set output voltage. At that time, step-up
converter resumes operation, and powers the ap-
plication.
Caution: In order to avoid applying excessive volt-
age to the Storage Media, a minimum delay must
be ensured during (and after if needed) the reset
phase, prior to switching ON the external STOR-
AGE switch.
DD
. The PLL is automatically stopped and the in-
DD
voltage (higher than step-up converter
DD
DD
voltage decreases dur-
Figure
is disconnected from
24.
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