STEVAL-IFS006V1 STMicroelectronics, STEVAL-IFS006V1 Datasheet - Page 82

• Manufacturer Part Number: STEVAL-IFS006V1
• Description: BOARD EVAL 8BIT MICRO + TDE1708
• Manufacturer: STMicroelectronics

Specifications of STEVAL-IFS006V1

• Design Resources: STEVAL-IFS006V1 Bill of Material
• Sensor Type: Proximity
• Interface: I²C
• Voltage - Supply: 6 V ~ 48 V
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: ST7FLITEUS5, TDE1708
• Processor To Be Evaluated: ST7LITEUS5
• Data Bus Width: 8 bit
• Operating Supply Voltage: 6 V to 48 V
• Silicon Manufacturer: ST Micro
• Silicon Core Number: TDE1708DFT
• Kit Application Type: Sensing - Touch / Proximity
• Application Sub Type: Proximity Switch
• Kit Contents: Board
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Sensitivity: -
• Sensing Range: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 497-6403; STEVAL-IFS006V1

On-chip peripherals
10.3.5
10.3.6
Note:
82/136
Interrupts
None.
Register description
Control/Status register (ADCCSR)
Reset value: 0000 0000 (00h)
A write to the ADCCSR register (with ADON set) aborts the current conversion, resets the
EOC bit and starts a new conversion.
Table 32.
AIN0
AIN1
AIN2
AIN3
AIN4
EOC
7
Bits 4:3 Reserved. Must be kept cleared.
Bits 2:0 CH[2:0] Channel Selection
Bit 7 EOC End of Conversion
Bit 6 SPEED ADC clock selection
Bit 5 ADON A/D Converter on
Channel selection
SPEED
This bit is set by hardware. It is cleared by software reading the ADCDRH register.
0: Conversion is not complete
1: Conversion complete
This bit is set and cleared by software. It is used together with the SLOW bit to
configure the ADC clock speed. Refer to the table in the SLOW bit description.
This bit is set and cleared by software.
0: A/D converter is switched off
1: A/D converter is switched on
These bits are set and cleared by software. They select the analog input to convert.
Channel pin
ADON
Read/Write (Except bit 7 read only)
0
0
0
0
0
0
1
CH2
CH2
ST7LITEUS2, ST7LITEUS5
0
0
1
1
0
CH1
CH1
0
1
0
1
0
CH0
CH0
0