CDB5376 Cirrus Logic Inc, CDB5376 Datasheet - Page 87

• Manufacturer Part Number: CDB5376
• Description: EVALUATION BOARD FOR CS5376
• Manufacturer: Cirrus Logic Inc

Specifications of CDB5376

• Main Purpose: Seismic Evaluation System
• Embedded: Yes, MCU, 8-Bit
• Utilized Ic / Part: CS3301A, CS3302A, CS4373A, CS5372A, CS5376A
• Primary Attributes: Quad Digital Filter
• Secondary Attributes: Graphical User Interface, SPI™ & USB Interfaces
• Processor To Be Evaluated: CS330x, CS4373A, CS537x
• Interface Type: USB
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
• Other names: 598-1778

23.2.1
DS612F4
Bit definitions:
23:19 --
18:16 DFS
(MSB)23
R/W
R/W
R/W
15
--
--
--
0
0
7
0
[2:0]
CONFIG : 0x00
R/W
R/W
R/W
22
14
--
--
--
0
0
6
0
reserved
Digital filter
frequency select
111: 16.384 MHz
110: 8.192 MHz
101: 4.096 MHz
100: 2.048 MHz
011: 1.024 MHz
010: 512 kHz
001: 256 kHz
000: 32 kHz
Figure 45. Hardware Configuration Register CONFIG
MCKEN2
R/W
R/W
R/W
21
13
--
--
0
0
5
0
MCKEN
R/W
R/W
R/W
15:11 --
10:8
20
12
--
--
0
0
4
0
MCKFS
[2:0]
MDIFS
R/W
R/W
R/W
19
11
--
--
0
0
3
0
reserved
MCLK frequency select
111: reserved
110: reserved
101: 4.096 MHz
100: 2.048 MHz
011: 1.024 MHz
010: 512 kHz
001: reserved
000: reserved
MCKFS2
DFS2
R/W
R/W
R/W
18
10
--
1
1
2
0
MCKFS1
BOOT
DFS1
R/W
R/W
17
R
0
9
0
1
0
7:6
5
4
3
2
1
0
MCKFS0
(LSB)0
MSEN
--
MCKEN2
MCKEN
MDIFS
--
BOOT
MSEN
DFS0
R/W
R/W
R/W
16
1
8
0
1
reserved
MCLK/2 output enable
1: Enabled
0: Disabled
MCLK output enable
1: Enabled
0: Disabled
MDATA input frequency
select
1: 256 kHz
0: 512 kHz
reserved
Boot source indicator
1: Booted from EEPROM
0: Booted from Micro
MSYNC enable
1: MSYNC generated
0: MSYNC remains low
DF Address: 0x00
--
R
W
R/W
Bits in bottom rows
are reset condition
Not defined;
read as 0
Readable
Writable
Readable and
Writable
CS5376A
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