AC164112 Microchip Technology, AC164112 Datasheet - Page 167
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AC164112
Manufacturer Part Number
AC164112
Description
VOLTAGE LIMITER MPLAB ICD2 VPP
Manufacturer
Microchip Technology
Datasheet
1.AC164112.pdf
(302 pages)
Specifications of AC164112
Accessory Type
Voltage Limiter
Product
Cable Assemblies
Features
Programming And Debugging The Latest PIC12/PIC16/PIC18 Products
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
MPLAB®
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With
MPLAB ICD 2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
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Manufacturer
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Company:
Part Number:
AC164112
Manufacturer:
Microchip Technology
Quantity:
135
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17.0
The Synchronous Serial Port (SSP) module is a serial
interface useful for communicating with other peripher-
als or microcontroller devices. These peripheral
devices may be serial EEPROMs, shift registers, dis-
play drivers, A/D converters, etc. The SSP module can
operate in one of two modes:
• Serial Peripheral Interface (SPI)
• Inter-Integrated Circuit (I
17.1
The SPI mode allows 8 bits of data to be synchronously
transmitted and received, simultaneously. The SSP
module can be operated in one of two SPI modes:
• Master mode
• Slave mode
SPI is a full-duplex protocol, with all communication
being bidirectional and initiated by a master device. All
clocking is provided by the master device and all bits
are transmitted, MSb first. Care must be taken to
ensure that all devices on the SPI bus are setup to
allow all controllers to send and receive data at the
same time.
FIGURE 17-1:
© 2009 Microchip Technology Inc.
SSP MODULE OVERVIEW
SPI Mode
SPI Master SSPM<3:0> = 00xx
MSb
Serial Input Buffer
Processor 1
Shift Register
TYPICAL SPI MASTER/SLAVE CONNECTION
(SSPBUF)
(SSPSR)
2
C™)
LSb
General I/O
SCK
SDO
SDI
Serial Clock
Slave Select
(optional)
PIC16F72X/PIC16LF72X
A typical SPI connection between microcontroller
devices is shown in Figure 17-1. Addressing of more
than one slave device is accomplished via multiple
hardware slave select lines. External hardware and
additional I/O pins must be used to support multiple
slave select addressing. This prevents extra overhead
in software for communication.
For SPI communication, typically three pins are used:
• Serial Data Out (SDO)
• Serial Data In (SDI)
• Serial Clock (SCK)
Additionally, a fourth pin may be used when in a Slave
mode of operation:
• Slave Select (SS)
SDO
SCK
SDI
SS
SPI Slave SSPM<3:0> = 010x
MSb
Serial Input Buffer
Shift Register
(SSPBUF)
(SSPSR)
Processor 2
LSb
DS41341E-page 167
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