L6701 STMicroelectronics, L6701 Datasheet

IC CTRLR 3PH VR10/9/K8 PWRSO-36

L6701

Manufacturer Part Number
L6701
Description
IC CTRLR 3PH VR10/9/K8 PWRSO-36
Manufacturer
STMicroelectronics
Datasheet

Specifications of L6701

Applications
Controller, Intel VR9, VR10, K8
Voltage - Input
12V
Number Of Outputs
3
Voltage - Output
0.8 ~ 1.85 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
36-PowerSOIC
Output Voltage
0.8 V to 1.85 V
Output Current
1.5 A
Switching Frequency
110 KHz
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
L6701
Manufacturer:
ST
0
Part Number:
L6701-TR
Manufacturer:
ST
0
Order codes
Features
Applications
December 2005
MULTI-DAC: VR9, VR10 AND K8 DAC
SELECTABLE THROUGH SINGLE PIN
0.7% OUTPUT VOLTAGE ACCURACY
ADJUSTABLE REFERENCE OFFSET
HIGH CURRENT INTEGRATED DRIVERS
DYNAMIC VID MANAGEMENT
ACCURATE FULLY-DIFFERENTIAL LOAD-
LINE CURRENT-SENSE ACROSS MAIN
INDUCTORS MAKES BOM INDEPENDENT
ON THE LAYOUT
PRECISE CURRENT-SHARING AND OCP
ACROSS LS MOSFETS
CONSTANT OVER-CURRENT PROTECTION
FEEDBACK DISCONNECTION
PROTECTION
PRELIMINARY OV PROTECTION
OSCILLATOR INTERNALLY FIXED AT
100kHz (300kHz RIPPLE) EXT ADJUSTABLE
SS_END / PGOOD SIGNAL
INTEGRATED REMOTE-SENSE BUFFER
PWSSO36 PACKAGE WITH EXPOSED PAD
HIGH CURRENT VRM / VRD FOR DESKTOP
/ SERVER/ WORKSTATION CPUs
HIGH DENSITY DC / DC CONVERTERS
Part number
L6701TR
L6701
3 Phase Controller for VR10, VR9 and K8 CPUs
PowerSSO-36
PowerSSO-36
Package
Description
L6701 is an extremely simple, low-cost solution to
implement a three phase step-down controller
with integrated high-current drivers in a compact
PowerSSO-36 package with exposed pad.
The device embeds three selectable DACs: with a
single pin it is possible to program the device to
work in compatibility with VR9, VR10 or K8
applications managing D-VID with ±0.7% output
voltage accuracy over line and temperature
variations. Additional programmable offset can be
added to the reference voltage with a single
external resistor.
Fast protection against load over current let the
system works in Constant Current mode until
UVP. Preliminary OVP allows full load protection
in case of startup with failed HS. Furthermore,
feedback disconnection prevents from damaging
the load in case of misconnections in the system
board.
Combined use of DCR and R
sensing assures precision in voltage positioning
and safe current sharing and OCP per each
phase.
PowerSSO-36
Tape & Reel
Packing
Tube
DS(on)
L6701
www.st.com
current
Rev 1
1/44
44

Related parts for L6701

L6701 Summary of contents

Page 1

... L6701 L6701TR December 2005 PowerSSO-36 Description L6701 is an extremely simple, low-cost solution to implement a three phase step-down controller with integrated high-current drivers in a compact PowerSSO-36 package with exposed pad. The device embeds three selectable DACs: with a single pin it is possible to program the device to work in compatibility with VR9, VR10 or K8 applications managing D-VID with ± ...

Page 2

... Current Sharing Loop and Current Reading . . . . . . . . . . . . . . . . . . . . . . . 20 9.1 Current Sharing Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9.2 Current Reading for Current Sharing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 10 Output Voltage Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 10.1 Load-Line (Droop Function - Optional 10.2 Fully-Differential Load-Line (Droop Function - Optional 10.3 Offset (Optional 10.4 Remote Voltage Sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10.5 Maximum Duty Cycle limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 2/44 L6701 ...

Page 3

... Over Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 14 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 15 System Control Loop Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 15.1 Compensation Network Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 16 Layout Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 16.1 Power Components and Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 16.2 Small Signal Components and Connections . . . . . . . . . . . . . . . . . . . . . . . . . 39 16.3 Embedding L6701-based VRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 17 Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 3/44 ...

Page 4

... Over-Current protection, with a threshold for each phase, causes the device to enter in constant current mode until the latched UVP. L6701 implements soft-start increasing the reference up to the final value in 2048 clock cycles in closed loop regulation. Low-Side-Less feature allows the device to perform soft-start over pre-biased output avoiding dangerous current return through the main inductors as well as negative spike at the load side ...

Page 5

... L6701 2 Pins description and connection diagrams Figure 1. Pins connection (Top view) 2.1 Pin description Table 1. Pins description ° Pin n Name 1 SGND 2 VCC 3 LGATE1 4 PGND 5 LGATE2 6 LGATE3 7 BOOT1 8 UGATE1 9 PHASE1 SGND 1 VCC 2 LGATE1 3 PGND 4 LGATE2 5 LGATE3 6 BOOT1 7 UGATE1 8 PHASE1 9 BOOT2 10 UGATE2 11 PHASE2 ...

Page 6

... FAULT: The pin is forced high (5V) to signal an OVP / UVP FAULT: to recover from this condition, cycle VCC or the OSC pin. See Function of each channel. SW Section 14). Leaving the pin Preliminary Over Voltage. When set low it Section 13 for details. L6701 ...

Page 7

... L6701 Table 1. Pins description (continued) ° Pin n Name 19 REF_IN 20 REF_OUT VID4 VID0, VID5 27 FBR 28 FBG ISEN3 ISEN1 32 CS+ 33 CS- 34 VSEN COMP THERMAL PAD PAD Reference Input for the regulation. Connect directly or through a resistor to the REF_OUT pin. See details. This pin is used as input for the protections. ...

Page 8

... Thermal Resistance Junction to Ambient R THJA (Device soldered on 2s2p PC Board) R Thermal Resistance Junction to Case THJC T Maximum Junction Temperature MAX T Storage Temperature Range STG T Junction Temperature Range J Maximum Power Dissipation at 25°C P TOT (Device soldered on 2s2p PC Board) 8/44 Parameter L6701 Value Unit - TBD V Value ...

Page 9

... L6701 4 Electrical specifications 4.1 Electrical characteristics Table 4. Electrical Characteristics (V = 12V±15 Symbol Parameter Supply Current and Power-ON I VCC Supply current CC I BOOTx Supply Current BOOTx V Turn-ON CC UVLO VCC V Turn-OFF CC Pre-OVP Turn-ON UVLO OVP Pre-OVP Turn-OFF Oscillator and Inhibit F Main Oscillator Accuracy ...

Page 10

... VCC = 10V VCC = 12V VSEN Rising, VR10 and K8 Mode VSEN Rising, VR9 Mode FBR Rising, VR10 and K8 Mode FBR Rising, VR9 Mode Hysteresis VSEN Falling; Below VID K8 and VR9 Mode; VSEN Falling; Below VID I = -4mA L6701 Min. Typ. Max. Unit V/µs 1 V/V ...

Page 11

... DAC_SEL 18 OSC/EN/FAULT 26 VID5 21 VID4 22 VID3 23 VID2 24 VID1 25 VID0 19 REF_IN REF_OUT 36 COMP VSEN 27 FBR 28 FBG L6701 REFERENCE SCHEMATIC 5 Typical application circuit and block diagram BOOT1 8 UGATE1 HS1 9 PHASE1 3 LGATE1 LS1 31 R ISEN ISEN1 BOOT2 11 UGATE2 HS2 12 PHASE2 5 LGATE2 LS2 30 R ISEN ISEN2 ...

Page 12

... SGND 17 DAC_SEL 18 OSC/EN/FAULT 26 VID5 21 VID4 22 VID3 23 VID2 24 VID1 25 VID0 19 REF_IN REF_OUT 36 COMP VSEN 27 FBR 28 FBG SSEND L6701 FULLY DIFFERENTIAL REFERENCE SCHEMATIC 12/ BOOT1 8 UGATE1 HS1 9 PHASE1 3 LGATE1 LS1 31 R ISEN ISEN1 BOOT2 11 UGATE2 HS2 12 PHASE2 5 LGATE2 LS2 30 R ISEN ISEN2 BOOT3 14 UGATE3 ...

Page 13

... LOGIC PWM LOGIC PWM ADAPTIVE ANTI ADAPTIVE ANTI CROSS CONDUCTION CURRENT SHARING CURRENT SHARING CORRECTION CORRECTION PWM1 PWM2 PWM1 PWM2 PWM3 L6701 CONTROL LOGIC AND PROTECTIONS OVP UVP, PGOOD I I DROOP INFO DROOP x3 CURRENT READING ERROR AMPLIFIER 5 Typical application circuit and block diagram ...

Page 14

... L6701 Output Voltage 1.2000 1.1875 1.1750 1.1625 1.1500 1.1375 1.1250 1.1175 1.1000 OFF OFF 1.0875 1.0750 1.0625 1.0500 1.0375 ...

Page 15

... L6701 Table 5. Voltage IDentification (VID) for Intel VR10 VID4 VID3 VID2 VID1 VID0 VID5 Since the VIDx pins program the maximum output voltage, according to VR10.x specifications, the device automatically regulates to a voltage 19mV lower avoiding the use of any external components to lower the output voltage. This improves the system tolerance performance since the reference already offset is trimmed in production within ± ...

Page 16

... OFF 1 L6701 Output Voltage 1.575 1.550 1.525 1.500 1.475 1.450 1.425 1.400 ...

Page 17

... Single-Wire CPU Automatic Detection L6701 has been designed to automatically detect the Intel CPU connected by monitoring the DAC_SEL pin status at the start-up so modifying the DAC table accordingly (see fact, by directly connecting the DAC_SEL pin with #BOOTSEL pin of the CPU, the controller automatically recognize the different technology steps of the CPU so modifying the DAC table accordingly ...

Page 18

... Power Dissipation L6701 embeds high current MOSFET drivers for both high side and low side MOSFETs then important to consider the power that the device is going to dissipate in driving them in order to avoid overcoming the maximum junction operative temperature. In addition, since the ...

Page 19

... L6701 Figure 5. Dissipated Power 8 Driver Section 19/44 ...

Page 20

... Current Sharing Loop and Current Reading 9 Current Sharing Loop and Current Reading 9.1 Current Sharing Loop L6701 embeds two separate Current Reading circuitries used to perform Current Sharing and OCP through ISENx pins and Voltage Positioning (Droop Function) through CS+ and CS- pins (See Section 10). ...

Page 21

... L6701 10 Output Voltage Positioning Output voltage positioning is performed by selecting the reference DAC and by programming the Droop Function and Offset to the reference (See from the FB pin, directly proportional to the read current, causes the output voltage to vary according to the external R current (I ) sourced from the REF_IN pin causes the reference voltage to be offset according ...

Page 22

... Fully-Differential current-reading for voltage-positioning allows the designer to save time in the application fine-tuning since the BOM so obtained becomes layout-independent. The patent- pending topology offered by L6701 allow implementing fully-differential current-sense still using only two current-sense pins (CS+ and CS-). used to implement the Fully-Differential Droop-Function. The current flowing across the three inductors is read through an R each phase to program the trans-conductance-gain ...

Page 23

... L6701 and, multiplied by three, sourced by the FB pin (I the desired load-line slope. As before, the voltage positioning equations results (See As a consequence: The device forces I DROOP R implementing the load regulation dependence. The output characteristic vs. load current is FB then given by (Offset disabled): V VID R = – ...

Page 24

... Remote Voltage Sense L6701 embeds a Remote Sense Buffer to sense remotely the regulated voltage without any additional external components. In this way, the output voltage programmed is regulated between the remote buffer inputs compensating motherboard or connector losses. The device ...

Page 25

... L6701 10.5 Maximum Duty Cycle limitation To provide proper time for current-reading in order to equalize the current carried by each phase, the device implements a duty-cycle limitation. This limitation is not fixed but it is linearly variable with the current delivered to the load as follow: Duty Cycle limitation is variable with the delivered current to provide fast load transient response at light load as well as assuring robust over-current protection ...

Page 26

... Dynamic VID Transitions L6701 is able to manage Dynamic VID Code changes in all its operative modes (VR10, K8 and also VR9) so allowing Output Voltage modification during normal device operation. PGOOD (when applicable), OVP and UVP signals are masked during every VID transition and they are re-activated after the transition finishes with a 32 clock cycles delay to prevent from false triggering ...

Page 27

... L6701 If the new VID code is more than 1 LSB different from the previous, the device will execute the Caution: transition stepping the reference with the DVID-clock frequency F reached: for this reason it is recommended to carefully control the VID change rate in order to carefully control the slope of the output voltage variation especially in VR10 mode. ...

Page 28

... Low-Side-Less Startup (LSLess) In order to avoid any kind of negative undershoot and dangerous return from the load during start-up, L6701 performs a special sequence in enabling LS driver to switch: during the soft- start phase, the LS driver results disabled (LS = OFF) until the HS starts to switch. This avoid the dangerous negative spike on the output voltage that can happen if starting over a pre- ...

Page 29

... L6701 13 Output voltage Monitor and Protections L6701 monitors through pin VSEN the regulated voltage in order to manage the OVP, UVP and PGOOD (when applicable) conditions. Protections are active also during soft-start (See Section 12 for details) while are masked during D-VID transitions with an additional 32 clock cycle delay after the transition has finished to avoid false triggering ...

Page 30

... OVP 13.3 Over Voltage Once VCC crosses the turn-ON threshold and the device is enabled (EN = Free), L6701 provides an Over Voltage Protection according to the DAC_SEL status: when the voltage sensed by VSEN overcomes the OVP threshold, the controller permanently switches on all the low-side MOSFETs and switches off all the high-side MOSFETs in order to protect the load. ...

Page 31

... Over Current Protection Output current in each phase is monitored by L6701 through R value of these resistors possible to set the OCP to the desired value. The Over Current threshold has to be programmed to a safe value, in order to be sure that the device doesn't enter OCP during normal operation of the device ...

Page 32

... OCPx V V – min ⋅ I ------------------------------------------ - 0. CPx L Figure I I – PEAK O CPx + ------------------------------------ - ⎞ 2 ⎠ --------------------------------------------- - max OFF Constant Current (Exploded) V OUT 0. Droop Effect Limted-T Char. ON Resulting Out. Char. UVP Threshold OCP OCPx ( 35µA) DROOP L6701 ⋅ SW 15): I OUT I MAX,tot ...

Page 33

... L6701 The trans-conductance resistor R bottom of the inductor current ripple and also considering the additional current delivered during the quasi-constant-current behavior as previously described in the worst case conditions. Moreover, when designing D-VID compatible systems, the additional current due to the output filter charge during dynamic VID transitions must be considered. ...

Page 34

... SGND the frequency is increased according to the following OSC 1.240V ⋅ 100kHz + ---------------------------- kΩ OSC 150 200 250 300 350 Fsw [kHz] Programmed ) connected OSC 6 ⋅ kHz 4.96 10 ---------- - = 100kHz + ---------------------------- µ kΩ OSC 400 450 500 550 L6701 ...

Page 35

... L6701 15 System Control Loop Compensation The control loop is composed by the Current Sharing control loop (See Average Current Mode control loop. Each loop gives, with a proper gain, the correction to the PWM in order to minimize the error in its regulation: the Current Sharing control loop equalize the currents in the inductors while the Average Current Mode control loop fixes the output voltage equal to the reference programmed by VID ...

Page 36

... C ESR + C ------- ⋅ (s), the transfer function has one (s) LOOP K R [dB] F ω ω ω ESR ( correspondence with the L-C F =ω and imposing the cross-over F LC might be not higher than 1/10th T L ⋅ ------------------- - ) F + ESR R F L6701 + 1 Z (s) F ω ω T ...

Page 37

... L6701 15.1 Compensation Network Guidelines The Compensation Network design assures to having system response according to the cross- over frequency selected and to the output filter considered anyway possible to further fine- tune the compensation network modifying the bandwidth in order to get the best response of the system as follow (See Increase R to increase the system bandwidth accordingly ...

Page 38

... Two kind of critical components and connections have to be considered when layouting a VRM based on L6701: power components and connections and small signal components connections. 16.1 Power Components and Connections These are the components and connections where switching and high continuous current flows from the input to the load ...

Page 39

... L6701 16.2 Small Signal Components and Connections These are small signal components and connections to critical nodes of the application as well as bypass capacitors for the device supply (See and Bootstrap capacitor) close to the device and refer sensible components such as frequency set-up resistor R OSC a single point to avoid that drops due to the high current delivered causes errors in the device behavior ...

Page 40

... Layout Guidelines 16.3 Embedding L6701-based VRs When embedding the VR into the application, additional care must be taken since the whole switching DC/DC regulator and the most common systems in which it has to work are digital systems such similar. In fact, latest MB has become faster and powerful: high speed data bus are more and more common and switching-induced noise produced by the VR’ ...

Page 41

... L6701 17 Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 42

... Typ. Max. 0.097 0.094 0 0.003 0.014 0.012 0.413 0.299 0.020 0.035 0.090 0.004 0.002 0.413 0.016 0.033 0.169 0.047 0.031 0.114 0.144 0.039 0.185 0.279 L6701 ...

Page 43

... L6701 18 Revision history Date Revision 13-Dec-2005 Description of Changes 1 First draft 18 Revision history 43/44 ...

Page 44

... All other names are the property of their respective owners Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 44/44 © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com L6701 ...

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