ADM1034ARQZ-R7 ON Semiconductor, ADM1034ARQZ-R7 Datasheet - Page 13

• Manufacturer Part Number: ADM1034ARQZ-R7
• Description: IC THERM/FAN SPEED CTLR 16-QSOP
• Manufacturer: ON Semiconductor

Specifications of ADM1034ARQZ-R7

• Function: Fan Control, Temp Monitor
• Topology: ADC, Comparator, Multiplexer, Register Bank
• Sensor Type: External & Internal
• Sensing Temperature: -40°C ~ 125°C, External Sensor
• Output Type: SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 16-QSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Block Read
slave device. The number of bytes to be read must be set in
advance. To do this, use a write byte operation to the
#Bytes/Block Read Register at Address 0x00. The register
address determines whether a block−read or a read−byte
operation is to be completed (set MSB to 1 to specify a
block−read operation). A maximum of 32 bytes can be read.
SMBus Timeout
feature. When this is enabled, the SMBus typically times out
after 25 ms of no activity. The timeout is disabled by default.
It prevents hangups by releasing the bus after a period of
inactivity.
(Bit 5) of Configuration Register 1 (Address 0x01) to 1.
of Configuration Register 1 (Address 0x01) to 1.
Packet Error Checking (PEC)
(PEC). This optional feature is triggered by the extra clock
for the PEC byte. The PEC byte is calculated using CRC−8.
The frame check sequence (FCS) conforms to CRC−8 by the
following:
For more information, consult www.SMBus.org.
S
In this operation, the master reads a block of data from a
The ADM1034 has a programmable SMBus timeout
To enable the SDA timeout, set the SDA timeout bit
To enable the SCL timeout, set the SCL timeout bit (Bit 4)
The ADM1034 also supports packet error checking
10. The master asserts ACK on SDA.
11. The slave sends N data bytes.
12. The master asserts ACK on SDA after each data
13. The master does not acknowledge after the Nth
14. The master asserts a stop condition on SDA to end
ADDRESS
SLAVE
1. The master asserts a start condition on SDA.
2. The master sends the 7−bit slave address followed
3. The addressed slave device asserts ACK on SDA.
4. The master sends the register address (MSB = 1).
5. The slave asserts ACK on SDA.
6. The master asserts a repeated start on SDA.
7. The master sends the 7−bit slave address followed
8. The slave asserts ACK on SDA.
9. The slave sends the byte count.
by the write bit (low).
by the read bit (high).
byte.
data byte.
the transaction.
W A
Figure 24. Block Read from RAM
C(x) + x
REGISTER
ADDRESS
8
A
) x
S
ADDRESS
SLAVE
2
) x ) 1
R A
COUNT
BYTE
A
DATA 1
A DATA N
(eq. 1)
http://onsemi.com
A
P
13
Alert Response Address (ARA)
feature allows an interrupting device to identify itself to the
host.
as an SMBusALERT. One or more ALERT outputs can be
connected to a common SMBusALERT line, connected to
the master.
Temperature Measurement System
Internal Temperature Measurement
sensor. The on−chip ADC performs conversions on the
sensor’s output, outputting the data in 13−bit format. The
resolution of the local temperature sensor is 0.03125°C.
Table 5 shows the same for the LSBs. To ensure accurate
readings, read the LSBs first. This locks the current LSBs
and MSBs until the MSBs are read. They then start to update
again. (Reading only the MSBs does not lock the registers.)
Temperature updates to the look−up table take place in
parallel; so fan speeds may be updated even if the MSBs are
locked.
When multiple devices exist on the same bus, the ARA
The ALERT output can be used as an interrupt output or
If a device’s ALERT line goes low, the following occurs:
The ADM1034 contains an on−chip band gap temperature
Table 4 shows the format of the temperature data MSBs.
1. SMBusALERT is pulled low.
2. The master initiates a receive byte operation and
3. The device with the low ALERT output responds
4. If low ALERT output is detected in more than one
5. Once the ADM1034 has responded to the ARA, it
sends the alert response address (ARA 0001 100).
This is a general call address that must not be used
as a specific address.
to the ARA, and the master reads its device
address. Once the address is known, it can be
interrogated in the usual way.
device, the one with the lowest device address has
priority, in accordance with normal SMBus
arbitration.
resets its ALERT output. However, if the error
persists, the ALERT is re−asserted on the next
monitoring cycle.
Figure 25. ALERT Response Address
S
ALERT RESPONSE
ADDRESS
R A
ADDRESS
DEVICE
A P