ADM1026JSTZ-REEL ON Semiconductor, ADM1026JSTZ-REEL Datasheet - Page 41
![IC CNTRL SYS REF/EEPROM 48-LQFP](/photos/7/49/74961/adm1026jstz_sml.jpg)
ADM1026JSTZ-REEL
Manufacturer Part Number
ADM1026JSTZ-REEL
Description
IC CNTRL SYS REF/EEPROM 48-LQFP
Manufacturer
ON Semiconductor
Datasheet
1.ADM1026JSTZ-R7.pdf
(55 pages)
Specifications of ADM1026JSTZ-REEL
Function
Hardware Monitor
Topology
ADC, Comparator, Multiplexer, Register Bank
Sensor Type
External & Internal
Sensing Temperature
0°C ~ 100°C, External Sensor
Output Type
SMBus™
Output Alarm
No
Output Fan
Yes
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
0°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
48-LFQFP
Full Temp Accuracy
+/- 3 C
Digital Output - Bus Interface
Serial (2-Wire)
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
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Table 29. Register 13h, EEPROM Register 3 (Power−On Default, 00h)
Table 30. Register 14h, Manufacturer’s Test Register 1 (Power−On Default, 00h)
Table 31. Register 15h, Manufacturer’s Test Register 2 (Power−On Default, 00h)
Table 32. Register 16h, Manufacturer’s ID (Power−On Default, 041h)
Table 33. Register 17h, Revision Register (Power−On Default, 4xh)
Table 34. Register 18h, Mask Register 1 (Power−On Default, 00h)
7–0
7–0
7–0
3–0
7–4
Bit
Bit
Bit
Bit
Bit
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Manufacturer ID Code
Manufacturer’s Test 1
Manufacturer’s Test 2
3.3 V STBY Mask = 0
3.3 V MAIN Mask = 0
Minor Revision Code
Major Revision Code
Ext1 Temp Mask = 0
+5.0 V Mask = 0
+12 V Mask = 0
−12 V Mask = 0
Test Mode Bit 0
Test Mode Bit 1
Test Mode Bit 2
V
Clock Extend
Write Protect
CCP
Ext2 Temp
Name
Erase
Name
Name
Name
Name
Name
Read
Write
Mask = 0
Once
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Setting this bit puts the EEPROM into read mode.
Setting this bit puts the EEPROM in write (program) mode.
Setting this bit puts the EEPROM into erase mode.
Setting this bit protects the EEPROM against accidental writing or erasure. This bit
can write once and only be cleared by a power−on reset.
Test mode bits. For factory use only
Test mode bits. For factory use only.
Test mode bits. For factory use only
Setting this bit enables SMBus clock extension. The ADM1026 can pull SCL low to
extend the clock pulse if it cannot accept any more data. It is recommended to set
this bit to 1 to extend the clock pulse during repeated EEPROM write or block write
operations.
This register is used by the manufacturer for test purposes. It should not be read
from or written to in normal operation.
This register is used by the manufacturer for test purposes. It should not be read
from or written to in normal operation.
This register contains the manufacturer’s ID code.
This nibble contains the manufacturer’s code for minor revisions to the device.
Rev 1 = 0h, Rev 2 = 1h, and so on.
This nibble denotes the generation of the device. For the ADM1026, this nibble
reads 4h.
When this bit is set, interrupts generated on the Ext1 temperature channel are
masked out.
When this bit is set, interrupts generated on the Ext2/A
When this bit is set, interrupts generated on the 3.3 V STBY voltage channel are
masked out.
When this bit is set, interrupts generated on the 3.3 V MAIN voltage channel are
masked out.
When this bit is set, interrupts generated on the +5.0 V voltage channel are masked
out.
When this bit is set, interrupts generated on the V
When this bit is set, interrupts generated on the +12 V voltage channel are masked out.
When this bit is set, interrupts generated on the −12 V voltage channel are masked out.
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Description
Description
Description
Description
Description
Description
CCP
voltage channel are masked out.
IN9
channel are masked out.