CP2401-GQ Silicon Laboratories Inc, CP2401-GQ Datasheet - Page 32

• Manufacturer Part Number: CP2401-GQ
• Description: IC LCD DRIVER 48TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2401-GQ

• Package / Case: 48-TQFP, 48-VQFP
• Display Type: LCD
• Configuration: 128 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1860

CP2400/1/2/3
5.
CP2400/1/2/3 devices include a 20 MHz internal oscillator that is selected as the system clock source upon reset.
Additional clocking options include an external CMOS clock input, the internal oscillator divided by 2, 4, or 8, and
the SmaRTClock real time clock oscillator. The system clock source is selected using the CLKSEL register. The
system clock selection may always be overridden by an external CMOS clock if the CLKOVR bit (MSCN.2) is set.
SFR Definition 5.1. CLKSL: Clock Select
Internal Register Address = 0x32
32
Name
Reset
Type
Bit
7:3
2:0
Bit
Clocking Options
CM O S
Clock
Unused
CLKSL
Name
R/W
32.768 kHz
7
0
XTAL1
XTAL2
CLK
Read = 00000. Write = Don’t Care.
System Clock Select.
Selects the oscillator to be used as system clock source.
000: Internal oscillator divided by 1.
001: Internal oscillator divided by 2.
010: Internal oscillator divided by 4.
011: Internal oscillator divided by 8.
100: CMOS clock (CLK pin).
101: SmaRTClock oscillator.
All other values reserved.
R/W
6
0
20 M Hz Internal
Sm aRTClock
O scillator
O scillator
R/W
Figure 5.1. Clocking Options
5
0
Rev. 1.0
R/W
8
4
2
4
0
Function
R/W
3
0
CLKSEL
2
0
CM O S
Clock
M SC N
CLKSL
R/W
1
0
SYSCLK
0
0