CP2401-GQ Silicon Laboratories Inc, CP2401-GQ Datasheet - Page 17

• Manufacturer Part Number: CP2401-GQ
• Description: IC LCD DRIVER 48TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2401-GQ

• Package / Case: 48-TQFP, 48-VQFP
• Display Type: LCD
• Configuration: 128 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1860

4.
SMBA0
XTAL1
XTAL2
Name
MOSI
MISO
LCD0
LCD1
PWR
GND
CAP
NSS
SCK
SDA
P0.0
P0.1
CLK
RST
SCL
V
INT
DD
Pinout and Package Definitions
SPI
41
48
47
46
45
44
43
42
40
39
—
—
—
—
1
2
3
4
48-pin
Pin Numbers
I
48
47
46
45
40
39
—
—
—
—
44
43
42
41
2
1
2
3
4
C
SPI
32
31
30
29
28
27
26
25
24
23
—
—
—
—
1
2
3
4
32-pin
I
32
31
30
29
28
27
26
25
24
23
—
—
—
—
2
1
2
3
4
Table 1. CP2400/1/2/3 Pin Definitions
C
Power In 1.8–3.6 V Power Supply Voltage Input.
Power
D Out
A Out
D Out
A Out
A Out
Type
D I/O
D I/O
D I/O
D I/O
A In
D In
D In
D In
D In
D In
D In
D In
Out
Rev. 1.0
Crystal Input. This pin is the return for the external oscillator
driver. This pin can be overdriven by an external CMOS clock.
Crystal Output. This pin is the excitation driver for a quartz
crystal.
Ground
LCD Power Supply Voltage Output. This pin requires a 10 µF
decoupling capacitor.
CMOS clock input. This pin should not be left floating.
Device Reset. An external source can initiate a system reset by
driving this pin low for at least 15 µs. This pin has an internal
weak pullup.
Interrupt Service Request. This pin provides notification to the
host. This pin is a push-pull output.
Slave select signal for SPI interface. This pin should not be left
floating.
Master Out/Slave In data signal for SPI interface. This pin
should not be left floating.
Master In/Slave Out data signal for SPI interface
Clock signal for SPI interface. This pin should not be left
floating.
Allows SMBus device to enter the Ultra Low Power mode. This
pin should not be left floating.
Clock signal for SMBus interface. This pin should not be left
floating.
Data signal for SMBus interface. This pin should not be left
floating.
Bit 0, SMBus Slave Address. This pin should not be left floating.
Bit 0, Port 0
Bit 1, Port 0
Description
CP2400/1/2/3
17