LH28F320SKTD-ZR Sharp Microelectronics, LH28F320SKTD-ZR Datasheet - Page 18
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LH28F320SKTD-ZR
Manufacturer Part Number
LH28F320SKTD-ZR
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
Sharp Microelectronics
Datasheet
1.LH28F320SKTD-ZR.pdf
(70 pages)
Specifications of LH28F320SKTD-ZR
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
32M (4Mx8, 2Mx16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V, 4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
425-2463
LHF32KZR
LHF32KZR
4.5 Query Command
Query database can be read by writing Query
command (98H). Following the command write, read
cycle from address shown in Table 7~11 retrieve the
critical information to write, erase and otherwise
control the flash component. A
address is ignored when X8 mode (BYTE#=V
Query data are always presented on the low-byte
data output (DQ
(DQ
any information or reserved for future use are set to
"0". This command functions independently of the
V
4.5.1 Block Status Register
This field provides lock configuration and erase status for the specified block. These informations are only available
when device is ready (SR.7=1). If block erase or bank erase operation is finished irregulary, block erase status bit
will be set to "1". If bit 1 is "1", this block is invalid.
Note:
1. BA=The beginning of a Block Address.
(BA+2)H
PP
(Word Address)
8
voltage. RP# must be V
-DQ
Offset
15
) outputs 00H. The bytes not assigned to
0
-DQ
7
). In x16 mode, high-byte
Length
01H
IH
.
0
Block Status Register
bit0
bit1
bit2-7 reserved for future use
of query offset
Table 7. Query Block Status Register
0=Block is unlocked
1=Block is Locked
0=Last erase operation completed successfully
1=Last erase operation not completed successfully
Block Lock Configuration
Block Erase Status
IL
).
LHF32KZR
X16 mode
X8 mode
Mode
Table 6. Example of Query Structure Output
Description
1 , 0 , 0 , 0 , 0 , 0 (20H)
1 , 0 , 0 , 0 , 0 , 1 (21H)
1, 0 , 0 , 0 , 1 , 0 (22H)
1 , 0 , 0 , 0 , 1 , 1 (23H)
A
1 , 0 , 0 , 0 , 0 (10H)
1 , 0 , 0 , 0 , 1 (11H)
5
A
, A
Offset Address
5
, A
4
, A
4
, A
3
, A
3
, A
2
, A
2
, A
1
, A
1
0
DQ
High Z
High Z
High Z
High Z
00H
00H
15~8
Output
DQ
"Q"
"Q"
"R"
"R"
"Q"
"R"
7~0
15