LH28F008SCT-L85 Sharp Microelectronics, LH28F008SCT-L85 Datasheet - Page 31

• Manufacturer Part Number: LH28F008SCT-L85
• Description: IC FLASH 8MBIT 85NS 40TSOP
• Manufacturer: Sharp Microelectronics

Specifications of LH28F008SCT-L85

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 85ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-TSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 425-1835; F008SCTL85; LHF08CH1

sharp
NOTES:
1. All currents are in RMS unless otherwise noted. Typical values at nominal V
2. I
3. Includes RY/BY#.
4. Block erases, byte writes, and lock-bit configurations are inhibited when V
5. Automatic Power Savings (APS) reduces typical I
6. CMOS inputs are either V
7. Sampled, not 100% tested.
8. Master lock-bit set operations are inhibited when RP#=V
9. RP# connection to a V
V
V
V
V
V
V
V
V
V
V
V
Sym.
IL
IH
OL
OH1
OH2
PPLK
PPH1
PPH2
PPH3
LKO
HH
the device’s current draw is the sum of I
range between V
and V
operation.
when the master lock-bit is set and RP#=V
block-lock bit is set and RP#=V
guaranteed with V
CCWS
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
V
Normal Operations
V
Block Erase or
Lock-Bit Operations
V
Block Erase or
Lock-Bit Operations
V
Block Erase or
Lock-Bit Operations
V
RP# Unlock Voltage
PPH3
and I
PP
PP
PP
PP
CC
Lockout during
during Byte Write,
during Byte Write,
during Byte Write,
Lockout Voltage
(min.), and above V
Parameter
CCES
PPLK
are specified with the device de-selected. If read or byte written while in erase suspend mode,
CC
<3.0V or V
(max.) and V
HH
CC
supply is allowed for a maximum cumulative period of 80 hours.
±0.2V or GND±0.2V. TTL inputs are either V
Notes Min.
PPH3
IH
3,7
3,7
3,7
4,7
8,9
IH
7
7
. Block erase, byte write, and lock-bit configuration operations are not
<RP#<V
PPH1
(max.).
0.85
DC Characteristics (Continued)
V
V
-0.5
-0.4
2.0
2.4
2.0
V




(min.), between V
CCWS
CC
CC
CC
HH
IH
=2.7V
. Block erases and byte writes are inhibited when the corresponding
and should not be attempted.
Max.
+0.5
V
or I
0.8
0.4
1.5




CC
LHF08CH1
CCES
CCR
Min.
0.85
V
V
11.4
11.4
-0.5
-0.4
2.0
2.4
3.0
4.5
2.0
V
to 1mA at 5V V
CC
CC
and I
CC
IH
PPH1
=3.3V
. Block lock-bit configuration operations are inhibited
CCR
Max.
+0.5
12.6
12.6
V
0.8
0.4
1.5
3.6
5.5
(max.) and V
CC
or I
Min.
0.85
11.4
11.4
V
V
CCW
-0.5
-0.4
2.0
2.4
4.5
2.0

CC
CC
CC
V
CC
, respectively.
and 3mA at 2.7V and 3.3V V
IL
=5V
PP
Max. Unit
PPH2
+0.5
0.45
12.6
12.6
V
or V
0.8
1.5
5.5
CC

≤V
CC
PPLK
voltage and T
IH
(min.), between V
.
V
V
V
V
V
V
V
V
V
V
V
V
, and not guaranteed in the
V
I
I
V
I
I
I
V
I
V
I
Set master lock-bit
Override master and
block lock-bit
OL
OL
OH
OH
OH
OH
OH
CC
CC
CC
CC
=5.8mA(V
=2.0mA
=-2.5mA(V
=-2.0mA(V
=-1.5mA(V
=-2.0mA
=-100µA
=V
(V
=V
=V
=V
A
Conditions
=+25°C.
CC
CC
CC
CC
CC
=3.3V, 2.7V)
PPH2
Test
Min.
Min.
Min.
Min.
CC
CC
(max.)
CC
CC
CC
=5V)
Rev. 1.3
in static
=5V)
=3.3V)
=2.7V)
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