NDS9956A_Q Fairchild Semiconductor, NDS9956A_Q Datasheet

NDS9956A_Q

Manufacturer Part Number

NDS9956A_Q

Description

MOSFET Dual N-Ch FET Enhancement Mode

Manufacturer

Fairchild Semiconductor

Datasheet

1.NDS9956A_Q.pdf (7 pages)

Specifications of NDS9956A_Q

Transistor Polarity

N-Channel

Drain-source Breakdown Voltage

30 V

Gate-source Breakdown Voltage

+/- 20 V

Continuous Drain Current

+/- 3.7 A

Resistance Drain-source Rds (on)

0.08 Ohms

Configuration

Dual Dual Drain

Maximum Operating Temperature

+ 150 C

Mounting Style

SMD/SMT

Package / Case

SOIC-8 Narrow

Fall Time

5 ns

Forward Transconductance Gfs (max / Min)

6 S

Minimum Operating Temperature

- 55 C

Power Dissipation

2 W

Rise Time

13 ns

Typical Turn-off Delay Time

21 ns

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Absolute Maximum Ratings

Symbol

THERMAL CHARACTERISTICS

DSS

GSS

NDS9956A

Dual N-Channel Enhancement Mode Field Effect Transistor

General Description

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild's proprietary, high

cell density, DMOS technology. This very high density

process is especially tailored to minimize on-state resistance,

provide superior switching performance, and withstand high

energy pulses in the avalanche and commutation modes.

These devices are particularly suited for low voltage

applications such as DC/DC conversion and DC motor

control where fast switching, low in-line power loss, and

resistance to transients are needed.

STG

Parameter

Drain-Source Voltage

Gate-Source Voltage

Drain Current - Continuous

Power Dissipation for Dual Operation

Power Dissipation for Single Operation

Operating and Storage Temperature Range

Thermal Resistance, Junction-to-Ambient

Thermal Resistance, Junction-to-Case

- Pulsed

= 25°C unless otherwise noted

(Note 1a)

(Note 1b)

(Note 1c)

(Note 1)

Features

3.7A, 30V. R

High density cell design for extremely low R

High power and current handling capability in a widely used

surface mount package.

Dual MOSFET in surface mount package.

DS(ON)

NDS9956A

-55 to 150

= 0.08

± 3.7

± 20

± 15

1.6

0.9

@ V

= 10V

DS(ON)

February 1996

NDS9956A.SAM

Units

°C/W

°C

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NDS9956A_Q Summary of contents

Page 1

... Thermal Resistance, Junction-to-Ambient R JA Thermal Resistance, Junction-to-Case R JC © 1997 Fairchild Semiconductor Corporation Features 3.7A, 30V. R High density cell design for extremely low R High power and current handling capability in a widely used surface mount package. Dual MOSFET in surface mount package. ...

Page 2

Electrical Characteristics (T = 25°C unless otherwise noted) A Symbol Parameter OFF CHARACTERISTICS BV Drain-Source Breakdown Voltage DSS Zero Gate Voltage Drain Current I DSS I Gate - Body Leakage, Forward GSSF Gate - Body Leakage, Reverse I GSSR ON ...

Page 3

Electrical Characteristics (T = 25°C unless otherwise noted) A Symbol Parameter DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS I Maximum Continuous Drain-Source Diode Forward Current S V Drain-Source Diode Forward Voltage SD t Reverse Recovery Time rr Notes ...

Page 4

Typical Electrical Characteristics =10V 8.0 GS 6.0 5 DRAIN-SOURCE VOLTAGE (V) DS Figure 1. On-Region Characteristics. 1 3. 10V G S ...

Page 5

Typical Electrical Characteristics 1. 250µA D 1.08 1.04 1 0.96 0.92 -50 - JUNCTION TEMPERATURE (°C) J Figure 7. Breakdown Voltage Variation with Temperature ...

Page 6

Typical Thermal Characteristics 2.5 Total Power for Dual Operation 0.5 0 0.2 0.4 0.6 2oz COPPER MOUNTING PAD AREA (in Figure 12. SO-8 Dual Package Maximum Steady-State Power Dissipation versus Copper Mounting Pad ...

Page 7

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ CMOS FACT™ FACT Quiet Series™ FAST FASTr™ ...

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