FDW2507N_Q Fairchild Semiconductor, FDW2507N_Q Datasheet - Page 3

• Manufacturer Part Number: FDW2507N_Q
• Description: MOSFET N-Channel 2.5V Common Drain
• Manufacturer: Fairchild Semiconductor

Specifications of FDW2507N_Q

• Transistor Polarity: N-Channel
• Drain-source Breakdown Voltage: 20 V
• Gate-source Breakdown Voltage: +/- 12 V
• Continuous Drain Current: 7.5 A
• Resistance Drain-source Rds (on): 19 mOhms
• Configuration: Dual Common Quad Drain
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Fall Time: 13 ns
• Forward Transconductance Gfs (max / Min): 31 S
• Minimum Operating Temperature: - 55 C
• Power Dissipation: 1.6 W
• Rise Time: 13 ns
• Typical Turn-off Delay Time: 35 ns

© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
Pin Configuration
Pin Definitions
Pin #
10
1
2
3
4
5
6
7
8
9
Name
GND
V
V
C
EN
C
NC
NC
NC
V
OUT
SEL
B
B
IN
+
-
Description
Output Voltage Select Logic Input Pin. The V
connected to either a logic high or logic low level.
FAN5631: If a logic low is applied to the V
applied, V
FAN5632: If a logic low is applied to the V
and the output voltage accuracy is relaxed to meet optimum efficiency. If a logic high is
applied, the device operates like a typical charge pump converter.
Enable Input Pin. If a logic high is applied to the EN pin, the device is enabled. If a logic low is
applied, the device is disabled and the supply current is reduced to less than 1µA. The EN pin
cannot be left floating and must be connected to a logic high or logic low level.
Bucket Capacitor Positive Pin.
Ground Pin. This pin is connected to the internal MOSFET switches. This pin must be
externally connected to GND.
Bucket Capacitor Negative Pin.
Output Voltage Pin.
Not Connected. This pin is not internally connected.
Not Connected. This pin is not internally connected.
Supply Voltage Input.
Not Connected. This pin is not internally connected.
OUT
is 1.5V.
GND
V
C
C
EN
SEL
B
B
+
-
Figure 3. Pin Assignments
1
2
3
4
5
Top View
3
SEL
SEL
pin, V
pin, the efficiency optimization mode is enabled
SEL
10
9
8
7
6
pin cannot be left floating and must be
OUT
NC
V
NC
NC
V
IN
OUT
is 1.2V; if a logic high is
www.fairchildsemi.com