SST25VF032B-80-4I-S2AF Microchip Technology, SST25VF032B-80-4I-S2AF Datasheet - Page 7

• Manufacturer Part Number: SST25VF032B-80-4I-S2AF
• Description: IC FLASH SER 32M 80MHZ SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of SST25VF032B-80-4I-S2AF

• Memory Type: FLASH
• Memory Size: 32M (4M x 8)
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Format - Memory: FLASH
• Speed: 80MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Data Bus Width: 8 bit
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 25 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

32 Mbit SPI Serial Flash
SST25VF032B
Block Protection (BP3,BP2, BP1, BP0)
The Block-Protection (BP3, BP2, BP1, BP0) bits define the
size of the memory area, as shown in Table 4, to be soft-
ware protected against any memory Write (Program or
Erase) operation. The Write-Status-Register (WRSR)
instruction is used to program the BP3, BP2, BP1 and BP0
bits as long as WP# is high or the Block-Protect-Lock
(BPL) bit is 0. Chip-Erase can only be executed if Block-
Protection bits are all 0. After power-up, BP3, BP2, BP1
and BP0 are set to the defaults specified in Table 4.
TABLE 4: Software Status Register Block Protection
©2009 Silicon Storage Technology, Inc.
Protection Level
1. X = Don’t Care (RESERVED) default is “0
2. Default at power-up for BP2, BP1, and BP0 is ‘111’. (All Blocks Protected)
None
Upper 1/64
Upper 1/32
Upper 1/16
Upper 1/8
Upper 1/4
Upper 1/2
All Blocks
BP3
X
X
X
X
X
X
X
X
Status Register Bit
BP2
0
0
0
0
1
1
1
1
7
FOR
Block Protection Lock-Down (BPL)
WP# pin driven low (V
Lock-Down (BPL) bit. When BPL is set to 1, it prevents any
further alteration of the BPL, BP3, BP2, BP1, and BP0 bits.
When the WP# pin is driven high (V
effect and its value is “Don’t Care”. After power-up, the BPL
bit is reset to 0.
BP1
0
0
1
1
0
0
1
1
SST25VF032B
2
BP0
0
1
0
1
0
1
0
1
1
IL
), enables the Block-Protection-
Protected Memory Address
3C0000H-3FFFFFH
3F0000H-3FFFFFH
3E0000H-3FFFFFH
380000H-3FFFFFH
300000H-3FFFFFH
200000H-3FFFFFH
000000H-3FFFFFH
IH
32 Mbit
None
), the BPL bit has no
S71327-03-000
Data Sheet
T4.0 1327
05/09