SST25VF032B-80-4I-S2AF Microchip Technology, SST25VF032B-80-4I-S2AF Datasheet - Page 14
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SST25VF032B-80-4I-S2AF
Manufacturer Part Number
SST25VF032B-80-4I-S2AF
Description
IC FLASH SER 32M 80MHZ SPI 8SOIC
Manufacturer
Microchip Technology
Datasheets
1.SST25VF512A-33-4C-SAE.pdf
(2 pages)
2.SST25VF032B-80-4I-S2AF.pdf
(28 pages)
3.SST25VF032B-80-4I-QAE.pdf
(31 pages)
Specifications of SST25VF032B-80-4I-S2AF
Memory Type
FLASH
Memory Size
32M (4M x 8)
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Format - Memory
FLASH
Speed
80MHz
Interface
SPI Serial
Voltage - Supply
2.7 V ~ 3.6 V
Data Bus Width
8 bit
Interface Type
SPI
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Current
25 mA
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SST25VF032B-80-4I-S2AF
Manufacturer:
RENESAS
Quantity:
1 182
Company:
Part Number:
SST25VF032B-80-4I-S2AF
Manufacturer:
SST/50
Quantity:
2 192
Part Number:
SST25VF032B-80-4I-S2AF
Manufacturer:
SST
Quantity:
20 000
Data Sheet
32-KByte and 64-KByte Block-Erase
The 32-KByte Block-Erase instruction clears all bits in the
selected 32 KByte block to FFH. A Block-Erase instruction
applied to a protected memory area will be ignored. The
64-KByte Block-Erase instruction clears all bits in the
selected 64 KByte block to FFH. A Block-Erase instruction
applied to a protected memory area will be ignored. Prior to
any Write operation, the Write-Enable (WREN) instruction
must be executed. CE# must remain active low for the
duration of any command sequence. The 32-Kbyte Block-
Erase instruction is initiated by executing an 8-bit com-
mand, 52H, followed by address bits [A
[A
©2009 Silicon Storage Technology, Inc.
MS
FIGURE 13: 32-KByte Block-Erase Sequence
FIGURE 14: 64-KByte Block-Erase Sequence
-A
15
] (A
MS
= Most Significant Address) are used to
SCK
SCK
CE#
CE#
SO
SO
SI
SI
MODE 3
MODE 0
MODE 3
MODE 0
23
-A
0
]. Address bits
MSB
MSB
0 1 2 3 4 5 6 7 8
0 1 2 3 4 5 6 7 8
D8
52
HIGH IMPEDANCE
HIGH IMPEDANCE
14
MSB
MSB
determine block address (BA
be V
is executed. The 64-Kbyte Block-Erase instruction is initi-
ated by executing an 8-bit command D8H, followed by
address bits [A
determine block address (BA
be V
is executed. Poll the Busy bit in the software status register
or wait T
KByte Block-Erase or 64-KByte Block-Erase cycles. See
Figure 13 for the 32-KByte Block-Erase sequence and Fig-
ure 14 for the 64-KByte Block-Erase sequence.
ADDR
ADDR
IL
IL
15 16
15 16
or V
or V
BE
ADDR
ADDR
IH.
IH.
for the completion of the internal self-timed 32-
CE# must be driven high before the instruction
CE# must be driven high before the instruction
23 24
23 24
23
1327 63KBlkEr.0
-A
1327 32KBklEr.0
ADDR
ADDR
0
]. Address bits [A
32 Mbit SPI Serial Flash
31
31
X
X
), remaining address bits can
), remaining address bits can
SST25VF032B
MS
S71327-03-000
-A
16
] are used to
05/09