S9S08SG8E2VTJR Freescale Semiconductor, S9S08SG8E2VTJR Datasheet - Page 94

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S9S08SG8E2VTJR

Manufacturer Part Number
S9S08SG8E2VTJR
Description
8-bit Microcontrollers - MCU 9S08 UC W/ 8K 0.25UM SGF
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S08SG8E2VTJR

Rohs
yes
Core
HCS08
Data Bus Width
8 bit
Maximum Clock Frequency
40 MHz
Program Memory Size
8 KB
Data Ram Size
512 B
On-chip Adc
Yes
Operating Temperature Range
- 40 C to + 85 C
Package / Case
TSSOP-20
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
12
Interface Type
I2C, SCI, SPI
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
16
Number Of Timers
3
Program Memory Type
Flash
Supply Voltage - Max
5.5 V
Supply Voltage - Min
2.7 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08SG8E2VTJR
Manufacturer:
FREESCALE
Quantity:
20 000
Chapter 6 Parallel Input/Output Control
6.6.2.3
6.6.2.4
88
PTBPE[7:0]
PTBSE[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBPE7
PTBSE7
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
Port B Pull Enable Register (PTBPE)
0
Port B Slew Rate Enable Register (PTBSE)
0
7
7
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured to detect
rising edges.
PTBPE6
PTBSE6
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
0
0
6
6
Table 6-12. PTBPE Register Field Descriptions
Table 6-13. PTBSE Register Field Descriptions
PTBPE5
PTBSE5
0
0
5
5
MC9S08SG32 Data Sheet, Rev. 8
PTBPE4
PTBSE4
NOTE
0
0
4
4
Description
Description
PTBPE3
PTBSE3
3
0
3
0
PTBPE2
PTBSE2
0
0
2
2
PTBPE1
PTBSE1
Freescale Semiconductor
0
0
1
1
PTBPE0
PTBSE0
0
0
0
0

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