E981.12A39BB ELMOS Semiconductor, E981.12A39BB Datasheet - Page 9

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E981.12A39BB

Manufacturer Part Number
E981.12A39BB
Description
Interface - Specialized Dual I/O Link Master Transciever
Manufacturer
ELMOS Semiconductor
Datasheet

Specifications of E981.12A39BB

Rohs
yes
Product Type
Dual I/O link Master Transceiver
Operating Supply Voltage
3.3 V
Supply Current
5.5 mA
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
QFN-44
Minimum Operating Temperature
- 40 C
Dual IO-Link Master Transceiver with UARTS
ADVANCE PRODUCT INFORMATION - JUL 26, 2011
Electrical Characteristics (continued)
(V
noted. Typical values are at V
Positive currents flow into the device pins.)
This document contains information on a new product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
Transmit propagation delay from
TXD to CQ_OUT
Transmit propagation delay from
TXD to CQ_OUT
Wake-up pulse duration
OFF time after wake-up pulse
ON time with overload
First OFF time after first ON or
wake-up pulse
OFF time after overload
detection, default value
OFF time after overload
detection, configured
OFF time after overload
detection, configured
OFF time after overload
detection, configured
Debounce time for over current
detection
IO-Link Receiver
Input threshold high for
IEC61131-2 type 2
Input threshold high for IOLINK
and IEC61131-2 type 1
Input threshold low
Input threshold hysteresis for
IEC61131-2 type 2
Input threshold hysteresis for
IOLINK and IEC61131-2 type 1
Receiver input debounce filter
time
Input pull down current 1 for
input IEC61131-2 type 2
Input pull down current 2 for
input IEC61131-2 type 2
UART
UART master tolerance
UART receiver detects IDLE
after N
TRX buffer memory size
DDH
= +8V to +32V for SIO mode, V
BIT,IDLE
Description
* bit times
DDH
= +24V, V
V(Lx)= 24V
bit FAST=“0“
V(Lx)= 24V
bit FAST=“1“
Wake-up request
wake-up procedure
TDOFF1,2= „00“
TDOFF1,2= „01“
TDOFF1,2= „10“
TDOFF1,2= „11"
18V < V
18V < V
18V < V
18V < V
18V < V
t
BD1/BD0
PD-Source enabled
V
PD-Source enabled
V
at least one byte
UART reception
before
BIT
CQ_INx
CQ_INx
depends on
DD
Condition
=3.15V to 3.45V, Tamb = -40°C to +105°C, unless otherwise
> 5 V
> 5 V
Lx
Lx
Lx
Lx
Lx
DD
< 30V
< 30V
< 30V
< 30V
< 30V
Data Sheet 9 / 44
= +3.3V and Tamb = +25°C.
t
t
t
t
dOFF2_OL_CONF1
dOFF2_OL_CONF2
dOFF2_OL_CONF3
dOFF2_OL_CONF4
V
V
UART
Symbol
V
V
HYSs__IOLINK
t
t
t
t
N
THHsIOLINK
pd_hspeed
t
dOFF1_OL
dOFF_WU
t
pd_lspeed
I
I
dON_OL
t
THHsIEC2
V
HYSsIEC2
CQ_deb
n
pdown1
pdown2
BIT,IDLE
debOL
t
MEM
WU
THLs
TOL
Min
0.5
75
85
11
9
8
2
6
2
*t
*t
*t
*t
*t
1/9*t
QM-No.: 25DS0069E.00
Typ
127
350
100
200
200
120
320
dON_OL
dON_OL
dON_OL
dON_OL
dON_OL
80
64
15
10
12
9
1
3
8
4
5
BIT
Max
400
115
4.5
1.7
1.5
0.1
85
11
13
10
12
E981.12
4
7
Unit
byte
mA
mA
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
%
V
V
V
V
V

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