E981.12A39BB ELMOS Semiconductor, E981.12A39BB Datasheet - Page 43

• Manufacturer Part Number: E981.12A39BB
• Description: Interface - Specialized Dual I/O Link Master Transciever
• Manufacturer: ELMOS Semiconductor

Specifications of E981.12A39BB

• Rohs: yes
• Product Type: Dual I/O link Master Transceiver
• Operating Supply Voltage: 3.3 V
• Supply Current: 5.5 mA
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Package / Case: QFN-44
• Minimum Operating Temperature: - 40 C

Dual IO-Link Master Transceiver with UARTS
ADVANCE PRODUCT INFORMATION - JUL 26, 2011
7 Register Table
This document contains information on a new product. ELMOS Semiconductor AG reserves the right to change specifications and information herein without notice.
ELMOS Semiconductor AG
ISTAT
VMON STAT
VMON IE
WTIM CFG
PDR_CFG1
PDR_CFG2
PDR_STAT
CLK_STAT
CLK_CTRL
CLK_FAC_LO
CLK_FAC_HI
CH CFG
CH STAT
TRX CFG
TX OCCFG
UART TXNUM
UART RXNUM
TIM CFG
TIM IE
TIM STAT
TIM PER
RX STAT
CH CFG
CH STAT
TRX CFG
TX OCCFG
UART TXNUM
UART RXNUM
TIM CFG
TIM IE
TIM STAT
TIM PER
RX STAT
Register Name Address
0x0A
0x0B
0x0C
0x0D
0x0E
0x1A
0x2A
0x00
0x02
0x03
0x04
0x09
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
Page 40 Table 31
Page 14 Table 5
Page 14 Table 6
Page 32 Table 23
Page 42 Table 33
Page 42 Table 34
Page 42 Table 35
Page 35 Table 28
Page 34 Table 25
Page 34 Table 26
Page 34 Table 27
Page 22 Table 8
Page 23 Table 9
Page 23 Table 10
Page 24 Table 11
Page 24 Table 12
Page 24 Table 13
Page 28 Table 18
Page 29 Table 19
Page 29 Table 20
Page 30 Table 21
Page 25 Table 14
Page 22 Table 8
Page 23 Table 9
Page 23 Table 10
Page 24 Table 11
Page 24 Table 12
Page 24 Table 13
Page 28 Table 18
Page 29 Table 19
Page 29 Table 20
Page 30 Table 21
Page 25 Table 14
Reference
Table 36: Register Table
Data Sheet 43 / 44
Interrupt source register
Voltage monitor status register
Voltage monitor interrupt enable register
WURQ configuration and status register
Configuration of PMOS gate control
Gate control interrupt enable
Gate control status register
Clock status register
Clock system control
Clock divider register
Clock divider register
Channel 1 configuration
Channel 1 status and error register
Transceiver config channel 1
Transmitter over current configuration register
channel 1
Number of Bytes for TX channel 1
Number of Bytes for RX channel 1
Timer config channel 1
Timer Interrupt enable register channel 1
IO-Link Cycle Timer status register channel 1
IO-Link Cycle Timer Period and Prescale
configuration channel 1
Receiver status and error register channel 1
Channel 2 configuration
Channel 2 status and error register
Transceiver config channel 2
Transmitter over current configuration register
channel 2
Number of Bytes for TX channel 2
Number of Bytes for RX channel 2
Timer config channel 2
Timer Interrupt enable register channel 2
IO-Link Cycle Timer status register channel 2
IO-Link Cycle Timer Period and Prescale
configuration channel 2
Receiver status and error register channel 2
Description
QM-No.: 25DS0069E.00
E981.12