AT45DB161E-CCUD-T Adesto Technologies, AT45DB161E-CCUD-T Datasheet - Page 6
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AT45DB161E-CCUD-T
Manufacturer Part Number
AT45DB161E-CCUD-T
Description
Flash 16M 2.5-3.6V 85Mhz Serial Flash
Manufacturer
Adesto Technologies
Datasheet
1.AT45DB161E-SHD-B.pdf
(72 pages)
Specifications of AT45DB161E-CCUD-T
Rohs
yes
Data Bus Width
8 bit
Memory Type
Data Flash
Memory Size
16 Mbit
Architecture
Flexible, Uniform Erase
Timing Type
Synchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.5 V
Maximum Operating Current
26 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
BGA-9
Factory Pack Quantity
4000
Part # Aliases
AT45DB161D-CU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT45DB161E-CCUD-T
Manufacturer:
Adesto Technologies
Quantity:
10 000
4.
Device Operation
The device operation is controlled by instructions from the host processor. The list of instructions and their associated
opcodes are contained in
Table 15-1 on page 40
through
Table 15-4 on page
41. A valid instruction starts with the falling
edge of CS followed by the appropriate 8-bit opcode and the desired buffer or main memory address location. While the
CS pin is low, toggling the SCK pin controls the loading of the opcode and the desired buffer or main memory address
location through the SI (Serial Input) pin. All instructions, addresses, and data are transferred with the Most Significant
Bit (MSB) first.
Three address bytes are used to address memory locations in either the main memory array or in one of the SRAM
buffers. The three address bytes will be comprised of a number of dummy bits and a number of actual device address
bits, with the number of dummy bits varying depending on the operation being performed and the selected device page
size. Buffer addressing for the standard DataFlash page size (528 bytes) is referenced in the datasheet using the
terminology BFA9 - BFA0 to denote the 10 address bits required to designate a byte address within a buffer. The main
memory addressing is referenced using the terminology PA11 - PA0 and BA9 - BA0, where PA11 - PA0 denotes the
12 address bits required to designate a page address, and BA9 - BA0 denotes the 10 address bits required to designate
a byte address within the page. Therefore, when using the standard DataFlash page size, a total of 22 address bits are
used.
For the “power of 2” binary page size (512 bytes), the buffer addressing is referenced in the datasheet using the
conventional terminology BFA8 - BFA0 to denote the nine address bits required to designate a byte address within a
buffer. Main memory addressing is referenced using the terminology A20 - A0, where A20 - A9 denotes the 12 address
bits required to designate a page address, and A8 - A0 denotes the nine address bits required to designate a byte
address within a page. Therefore, when using the binary page size, a total of 21 address bits are used.
Adesto AT45DB161E [DATASHEET]
6
8782D–DFLASH–11/2012