AT45DB321D-CCU Adesto Technologies, AT45DB321D-CCU Datasheet - Page 4

• Manufacturer Part Number: AT45DB321D-CCU
• Description: Flash 32M 2.7-3.6V, 66Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT45DB321D-CCU

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Data Flash
• Memory Size: 32 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 15 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-24
• Factory Pack Quantity: 378

2.
Figure 1-2. Block Diagram
Memory Array
To provide optimal flexibility, the AT45DB321D memory array is divided into three levels of granularity comprising sectors,
blocks, and pages. The
pages per sector and block. All program operations to the DataFlash device occur on a page-by-page basis. The erase
operations can be performed at the chip, sector, block, or page level.
Figure 2-1. Memory Architecture Diagram
RDY/BUSY
RESET
Sector Architecture
SECTOR 62 = 128 Pages
SECTOR 63 = 128 Pages
SECTOR 1 = 128 Pages
SECTOR 2 = 128 Pages
GND
SECTOR 0b = 120 Pages
VCC
SECTOR 0a = 8 Pages
SCK
65,536-/67,584-bytes
65,536-/67,584-bytes
65,536-/67,584-bytes
65,536-/67,586-bytes
61,440-/63,360-bytes
WP
4,096-/4,224-bytes
CS
“Memory Architecture Diagram”
Page (512-/528-bytes)
Buffer 1 (512-/528-bytes)
SECTOR 0a
SI
Block = 4,096-/4,224-bytes
Block Architecture
illustrates the breakdown of each level, and details the number of
Flash Memory Array
BLOCK 1,022
BLOCK 1,023
BLOCK 126
BLOCK 127
BLOCK 128
BLOCK 129
BLOCK 62
BLOCK 63
BLOCK 64
BLOCK 65
BLOCK 0
BLOCK 1
BLOCK 2
I/O Interface
8 Pages
Buffer 2 (512-/528-bytes)
AT45DB321D [DATASHEET]
SO
3597R–DFLASH–11/2012
Page Architecture
Page = 512-/528-bytes
PAGE 8,190
PAGE 8,191
PAGE 14
PAGE 15
PAGE 16
PAGE 17
PAGE 18
PAGE 0
PAGE 1
PAGE 6
PAGE 7
PAGE 8
PAGE 9
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