AT45DB321D-CCU Adesto Technologies, AT45DB321D-CCU Datasheet - Page 13

• Manufacturer Part Number: AT45DB321D-CCU
• Description: Flash 32M 2.7-3.6V, 66Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT45DB321D-CCU

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Data Flash
• Memory Size: 32 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 15 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA-24
• Factory Pack Quantity: 378

7.1.2
The sector protection register can be erased with sector protection enabled or disabled. Since the erased state (FFH) of each
byte in the sector protection register is used to indicate that a sector is specified for protection, leaving sector protection enabled
during the erasing of the register allows the protection scheme to be more effective in the prevention of accidental programming
or erasing of the device. If for some reason an erroneous program or erase command is sent to the device immediately after
erasing the sector protection register and before the register can be reprogrammed, then the erroneous program or erase
command will not be processed because all sectors will be protected.
Table 7-4.
Figure 7-2. Erase Sector Protection Register
Program Sector Protection Register Command
Once the sector protection register has been erased, it can be reprogrammed using the program sector protection register
command.
To program the sector protection register, the CS pin must first be asserted, and then the appropriate four-byte opcode
sequence must be clocked into the device via the SI pin. The four-byte opcode sequence must start with 3DH, and be followed
by 2AH, 7FH, and FCH. After the last bit of the opcode sequence has been clocked into the device, the data for the contents of
the sector protection register must be clocked in. As described in
data, and so 64 bytes must be clocked into the device. The first byte of data corresponds to sector 0, the second byte
corresponds to sector 1, and so on, with the last byte of data corresponding to sector 63.
After the last data byte has been clocked in, the CS pin must be deasserted to initiate the internally self-timed program cycle.
The programming of the sector protection register should take place in a maximum time of t
will indicate that the device is busy. If the device is powered down during the program cycle, the contents of the sector
protection register cannot be guaranteed.
If the proper number of data bytes is not clocked in before the CS pin is deasserted, then the protection status of the sectors
corresponding to the bytes not clocked in can not be guaranteed. For example, if only the first two bytes are clocked in instead
of the complete 62 bytes, then the protection status of the last 62 sectors cannot be guaranteed. Furthermore, if more than 64
bytes of data are clocked into the device, then the data will wrap back around to the beginning of the register. For instance, if 65
bytes of data are clocked in, then the 65
If a value other than 00H or FFH is clocked into a byte location of the sector protection register, then the protection status of the
sector corresponding to that byte location cannot be guaranteed. For example, if a value of 17H is clocked into byte location 2 of
the sector protection register, then the protection status of sector 2 cannot be guaranteed.
The sector protection register can be reprogrammed while sector protection is enabled or disabled. Being able to reprogram the
sector protection register with sector protection enabled allows the user to temporarily disable the sector protection of an
individual sector rather than disabling sector protection completely.
The program sector protection register command utilizes the internal SRAM buffer 1 for processing. Therefore, the contents of
buffer 1 will be altered from its previous state when this command is issued.
Table 7-5.
Command
Erase sector protection register
CS
Command
Program sector protection register
SI
Each transition
represents 8 bits
Erase Sector Protection Register Command
Program Sector Protection Register Command
Opcode
byte 1
Opcode
byte 2
th
byte will be stored at byte location 0 of the sector protection register.
Opcode
byte 3
Byte 1
Opcode
3DH
byte 4
Byte 1
3DH
Section
7.1, the sector protection register contains 64 bytes of
Byte 2
2AH
Byte 2
2AH
AT45DB321D [DATASHEET]
P
, during which the status register
Byte 3
7FH
Byte 3
7FH
3597R–DFLASH–11/2012
Byte 4
Byte 4
CFH
FCH
13