S25FL128SDPMFIG11 Spansion, S25FL128SDPMFIG11 Datasheet - Page 94
S25FL128SDPMFIG11
Manufacturer Part Number
S25FL128SDPMFIG11
Description
Flash 128Mb 3V 66MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet
1.S25FL128SAGNFI001.pdf
(153 pages)
Specifications of S25FL128SDPMFIG11
Rohs
yes
Data Bus Width
1 bit
Memory Type
Flash
Memory Size
128 Mbit
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
100 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SO-16
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10.4.2
CS
CS#
SCK
CS#
SO
SCK
SCLK
SI
SO
SI
CS#
SO
SI
7
0
Figure 10.25 Fast Read Command Sequence (4-byte Address, 0Ch or 0B [ExtAdd=1], LC=10b)
Figure 10.26 Fast Read Command Sequence (4-byte Address, 0Ch or 0B [ExtAdd=1], LC=11b)
Fast Read (FAST_READ 0Bh or 4FAST_READ 0Ch)
0
0
The instruction
0Bh (ExtAdd=0) is followed by a 3-byte address (A23-A0) or
0Bh (ExtAdd=1) is followed by a 4-byte address (A31-A0) or
0Ch is followed by a 4-byte address (A31-A0)
The address is followed by zero or eight dummy cycles depending on the latency code set in the
Configuration Register. The dummy cycles allow the device internal circuits additional time for accessing the
initial address location. During the dummy cycles the data value on SO is “don’t care” and may be high
impedance. Then the memory contents, at the address given, are shifted out on SO.
The maximum operating clock frequency for FAST READ command is 133 MHz.
The address can start at any byte location of the memory array. The address is automatically incremented to
the next higher address in sequential order after each byte of data is shifted out. The entire memory can
therefore be read out with one single read instruction and address 000000h provided. When the highest
address is reached, the address counter will wrap around and roll back to 000000h, allowing the read
sequence to be continued indefinitely.
1
6
1
1
High Impedance
High Impedance
2
2
2
5
Instruction
Instruction
3
3
Instruction
4
3
4
4
Figure 10.24 Fast Read (FAST_READ) Command Sequence
5
5
4
3
6
6
7
7
5
2
23
31
8
8
(3-byte Address, 0Bh [ExtAdd=0, LC=10b])
22
30
9
9
6
1
21
29
10
10
Address
Address
32-Bit
24-Bit
7
0
S25FL128S and S25FL256S
28
36
3
3
31
29
37
2
8
2
32 Bit Address
30
38
1
1
31
39
0
0
D a t a
32
40
7
7
38
1
33
41
6
6
34
39
42
5
Dummy Byte
5
Dummy Byte
0
35
4
43
4
S h e e t
40
7
36
3
3
44
2
37
2
45
41
6
1
1
38
46
0
0
39
47
42
5
MSB
MSB
7
7
40
48
6
43
6
41
S25FL128S_256S_00_05 July 12, 2012
4
Data 1
49
5
42
5
DATA OUT 1
50
DATA OUT 1
44
3
4
43
4
51
3
44
3
52
45
2
2
45
2
53
1
46
46
1
1
54
0
47
0
55
MSB
MSB
47
7
0
7
DATA OUT 2
DATA OUT 2
48
Data 2
7
49
6
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