S25FL128SDPMFIG11 Spansion, S25FL128SDPMFIG11 Datasheet - Page 54

• Manufacturer Part Number: S25FL128SDPMFIG11
• Description: Flash 128Mb 3V 66MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL128SDPMFIG11

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: Flash
• Memory Size: 128 Mbit
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

Software Interface
8. Address Space Maps
8.1
8.2
54
8.1.1
8.1.2
Overview
Flash Memory Array
Extended Address
Multiple Address Spaces
This section discusses the features and behaviors most relevant to host system software that interacts with
S25FL128S and S25FL256S memory devices.
The S25FL128S and S25FL256S devices support 32-bit addresses to enable higher density devices than
allowed by previous generation (legacy) SPI devices that supported only 24-bit addresses. A 24-bit byte
resolution address can access only 16 Mbytes (128 Mbits) of maximum density. A 32-bit byte resolution
address allows direct addressing of up to a 4 Gbytes (32 Gbits) of address space.
Legacy commands continue to support 24-bit addresses for backward software compatibility. Extended 32-bit
addresses are enabled in three ways:
 Bank address register — a software (command) loadable internal register that supplies the high order bits
 Extended address mode — a bank address register bit that changes all legacy commands to expect 32 bits
 New commands — that perform both legacy and new functions, which expect 32-bit address.
The default condition at power-up and after reset, is the Bank address register loaded with zeros and the
extended address mode set for 24-bit addresses. This enables legacy software compatible access to the first
128 Mbits of a device.
The S25FL128S device supports the extended address features in the same way but in essence ignores bits
31 to 24 of any address because the main flash array only needs 24 bits of address. This enables simple
migration from the 128-Mb density to higher density devices without changing the address handling aspects
of software.
Many commands operate on the main flash memory array. Some commands operate on address spaces
separate from the main flash array. Each separate address space uses the full 32-bit address but may only
define a small portion of the available address space.
The main flash array is divided into erase units called sectors. The sectors are organized either as a hybrid
combination of 4-kB and 64-kB sectors, or as uniform 256-kbyte sectors. The sector organization depends on
the device model selected, see
of address when legacy 24-bit addresses are in use.
of address supplied from the host system.
Sector Size (kbyte)
64
4
Table 8.1 S25FL256S Sector and Memory Address Map, Bottom 4-kbyte Sectors
Sector Count
Ordering Information on page
510
S25FL128S and S25FL256S
32
D a t a
Sector Range
SA541
SA00
SA31
SA32
:
:
S h e e t
149.
01FF0000h-01FFFFFFh
00000000h-00000FFFh
0001F000h-0001FFFFh
00020000h-0002FFFFh
Address Range
(Byte Address)
S25FL128S_256S_00_05 July 12, 2012
:
:
Sector Starting Address
Sector Ending Address
Notes
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