S25FL128SDPMFIG11 Spansion, S25FL128SDPMFIG11 Datasheet - Page 69

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S25FL128SDPMFIG11

Manufacturer Part Number
S25FL128SDPMFIG11
Description
Flash 128Mb 3V 66MHz Serial NOR Flash
Manufacturer
Spansion
Datasheet

Specifications of S25FL128SDPMFIG11

Rohs
yes
Data Bus Width
1 bit
Memory Type
Flash
Memory Size
128 Mbit
Architecture
Uniform
Timing Type
Asynchronous
Interface Type
SPI
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
100 mA
Operating Temperature
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
SO-16
July 12, 2012 S25FL128S_256S_00_05
9.4.1
9.4.2
9.4.3
ASP Register
Persistent Protection Bits
Dynamic Protection Bits
The selection of the PPB Lock bit management method is made by programming OTP bits in the ASP
Register so as to permanently select the method used.
The ASP register is used to permanently configure the behavior of Advanced Sector Protection (ASP)
features. See
As shipped from the factory, all devices default ASP to the Persistent Protection mode, with all sectors
unprotected, when power is applied. The device programmer or host system must then choose which sector
protection method to use. Programming either of the, one-time programmable, Protection Mode Lock Bits,
locks the part permanently in the selected mode:
 ASPR[2:1] = 11 = No ASP mode selected, Persistent Protection Mode is the default.
 ASPR[2:1] = 10 = Persistent Protection Mode permanently selected.
 ASPR[2:1] = 01 = Password Protection Mode permanently selected.
 ASPR[2:1] = 00 = Illegal condition, attempting to program both bits to zero results in a programming failure.
ASP register programming rules:
 If the password mode is chosen, the password must be programmed prior to setting the Protection Mode
 Once the Protection Mode is selected, the Protection Mode Lock Bits are permanently protected from
The programming time of the ASP Register is the same as the typical page programming time. The system
can determine the status of the ASP register programming operation by reading the WIP bit in the Status
Register. See
After selecting a sector protection method, each sector can operate in each of the following states:
 Dynamically Locked — A sector is protected and can be changed by a simple command.
 Persistently Locked — A sector is protected and cannot be changed if its PPB Bit is 0.
 Unlocked — The sector is unprotected and can be changed by a simple command.
The Persistent Protection Bits (PPB) are located in a separate nonvolatile flash array. One of the PPB bits is
related to each sector. When a PPB is 0, its related sector is protected from program and erase operations.
The PPB are programmed individually but must be erased as a group, similar to the way individual words may
be programmed in the main array but an entire sector must be erased at the same time. The PPB have the
same program and erase endurance as the main flash memory array. Preprogramming and verification prior
to erasure are handled by the device.
Programming a PPB bit requires the typical page programming time. Erasing all the PPBs requires typical
sector erase time. During PPB bit programming and PPB bit erasing, status is available by reading the Status
register. Reading of a PPB bit requires the initial access time of the device.
Notes:
1. Each PPB is individually programmed to 0 and all are erased to 1 in parallel.
2. If the PPB Lock bit is 0, the PPB Program or PPB Erase command does not execute and fails without programming or erasing the PPB.
3. The state of the PPB for a given sector can be verified by using the PPB Read command.
Dynamic Protection Bits are volatile and unique for each sector and can be individually modified. DYB only
control the protection for sectors that have their PPB set to 1. By issuing the DYB Write command, a DYB is
cleared to 0 or set to 1, thus placing each sector in the protected or unprotected state respectively. This
feature allows software to easily protect sectors against inadvertent changes, yet does not prevent the easy
removal of protection when changes are needed. The DYBs can be set or cleared as often as needed as they
are volatile bits.
Lock Bits.
programming and no further changes to the ASP register is allowed.
Table 8.17, ASP Register (ASPR) on page
Status Register 1 (SR1) on page 58
D a t a
S25FL128S and S25FL256S
S h e e t
for information on WIP.
64.
69

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