S25FL128SDPMFIG11 Spansion, S25FL128SDPMFIG11 Datasheet - Page 13

• Manufacturer Part Number: S25FL128SDPMFIG11
• Description: Flash 128Mb 3V 66MHz Serial NOR Flash
• Manufacturer: Spansion

Specifications of S25FL128SDPMFIG11

• Rohs: yes
• Data Bus Width: 1 bit
• Memory Type: Flash
• Memory Size: 128 Mbit
• Architecture: Uniform
• Timing Type: Asynchronous
• Interface Type: SPI
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.7 V
• Maximum Operating Current: 100 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SO-16

2.2
July 12, 2012 S25FL128S_256S_00_05
2.2.1
2.2.2
2.2.2.1
2.2.2.2
Migration Notes
Features Comparison
Known Differences from Prior Generations
The S25FL128S and S25FL256S devices are command set and footprint compatible with prior generation
FL-K and FL-P families.
Notes:
1. 256B program page option only for 128 Mb and 256 Mb density FL-S devices.
2. FL-P column indicates FL129P MIO SPI device (for 128 Mb density).
3. 64 kB sector erase option only for 128 Mb/256 Mb density FL-P and FL-S devices.
4. FL-K family devices can erase 4 kB sectors in groups of 32 kB or 64 kB.
5. Refer to individual data sheets for further details.
Error Reporting
Prior generation FL memories either do not have error status bits or do not set them if program or erase is
attempted on a protected sector. The FL-S family does have error reporting status bits for program and erase
operations. These can be set when there is an internal failure to program or erase or when there is an attempt
to program or erase a protected sector. In either case the program or erase operation did not complete as
requested by the command.
Secure Silicon Region (OTP)
The size and format (address map) of the One Time Program area is different from prior generations. The
method for protecting each portion of the OTP area is different. For additional details see
Region (OTP) on page
Technology Node
Architecture
Release Date
Density
Bus Width
Supply Voltage
Normal Read Speed (SDR)
Fast Read Speed (SDR)
Dual Read Speed (SDR)
Quad Read Speed (SDR)
Fast Read Speed (DDR)
Dual Read Speed (DDR)
Quad Read Speed (DDR)
Program Buffer Size
Erase Sector Size
Parameter Sector Size
Sector Erase Time (typ.)
Page Programming Time (typ.)
OTP
Advanced Sector Protection
Auto Boot Mode
Erase Suspend/Resume
Program Suspend/Resume
Operating Temperature
Parameter
66.
D a t a
30 ms (4 kB), 150 ms (64 kB)
S25FL128S and S25FL256S
4 kB / 32 kB / 64 kB
13 MB/s (104 MHz)
26 MB/s (104 MHz)
52 MB/s (104 MHz)
6 MB/s (50 MHz)
768B (3 x 256B)
–40°C to +85°C
4 Mb - 128 Mb
Table 2.1 FL Generations Comparison
700 µs (256B)
Floating Gate
In Production
S h e e t
2.7V - 3.6V
x1, x2, x4
90 nm
FL-K
256B
4 kB
Yes
Yes
No
No
-
-
-
–40°C to +85°C / +105°C
13 MB/s (104 MHz)
20 MB/s (80 MHz)
40 MB/s (80 MHz)
5 MB/s (40 MHz)
32 Mb - 256 Mb
500 ms (64 kB)
1500 µs (256B)
64 kB / 256 kB
In Production
2.7V - 3.6V
x1, x2, x4
MirrorBit
90 nm
256B
506B
FL-P
4 kB
No
No
No
No
-
-
-
130 ms (64 kB), 520 ms (256 kB)
2.7V - 3.6V / 1.65V - 3.6V V
250 µs (256B), 340 µs (512B)
–40°C to +85°C / +105°C
17 MB/s (133 MHz)
26 MB/s (104 MHz)
52 MB/s (104 MHz)
16 MB/s (66 MHz)
33 MB/s (66 MHz)
66 MB/s (66 MHz)
128 Mb - 256 Mb
6 MB/s (50 MHz)
MirrorBit Eclipse
64 kB / 256 kB
Secure Silicon
4 kB (option)
256B / 512B
x1, x2, x4
2H2011
65 nm
1024B
FL-S
Yes
Yes
Yes
Yes
IO
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