iCE65L04F-LCB284I Lattice, iCE65L04F-LCB284I Datasheet - Page 60

• Manufacturer Part Number: iCE65L04F-LCB284I
• Description: FPGA - Field Programmable Gate Array iCE65 3520 LUTs, 1.0 1.2V Ultra Low-Power
• Manufacturer: Lattice

Specifications of iCE65L04F-LCB284I

• Rohs: yes
• Number Of Gates: 3520
• Number Of Logic Blocks: 20
• Number Of I/os: 176
• Maximum Operating Frequency: 256 MHz
• Operating Supply Voltage: 1.2 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: CBGA-284
• Distributed Ram: 80 Kbit
• Minimum Operating Temperature: - 40 C
• Operating Supply Current: 26 uA
• Factory Pack Quantity: 168

iCE65 Ultra Low-Power mobileFPGA
(2.42, 30-MAR-2012)
60
CB132 Chip-Scale Ball-Grid Array
The CB132 package is a partially-populated ball grid array with 0.5 mm ball pitch. The empty ball rings simplify
PCB layout. The iCE65L01, iCE65L04 and iCE65L08 devices are available in this package.
Footprint Diagram
Figure 41, Figure 42 and
Figure
See
package fits within the same ball pattern as the 12 x 12 mm CB284 package.
Figure 31
Also see
The signal pins are also grouped into the four I/O Banks and the SPI interface.
Figure 48
43 show the iCE65 footprint diagrams for the CB132 package in iCE65L01, iCE65L04 and iCE65L08 devices.
B
C
D
E
F
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Table 41
shows the conventions used in the diagram.
VCCIO_3
GBIN7/
GBIN6/
PIO0 PIO0 NC PIO0 PIO0
GND
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
1
1
for the “universal” chip-scale BGA footprint for the CB132 and CB284 packages. The 8 x 8 mm CB132
for a complete, detailed pinout for the 132-ball BGA package.
PIO2 PIO2 PIO2 PIO2
Figure 41
2
2
VCCIO_3
GND
PIO2
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
3
3
: iCE65L01 CB132 Chip-Scale BGA Footprint (Top View)
PIO0 PIO0
PIO2
PIO2
VCC
PIO3
PIO3
PIO3
PIO3
PIO3
PIO3
4
4
VCCIO_2
PIO0
PIO2
5
5
I/O Bank 0
VCCIO_0
VCCIO_3
GBIN1/
PIO0
PIO0
PIO0
PIO2
PIO2
GND GND GND
GND
VCC
6
6
I/O Bank 2
GBIN0/
GBIN5/
PIO0
PIO0
PIO0
GND VCC
GND GND GND
PIO2
PIO2
PIO2
VCC
7
7
™
Family
VCCIO_0
GBIN4/
PIO0
PIO0
PIO2
PIO2
PIO2
GND
8
8
VCCIO_1
VCCIO_2
CBSEL0
PIO2/
GND
PIO0
PIO0
PIO2
PIO2 PIO2/
VCC
9
9
CRESET_B
CBSEL1
CDONE
PIO0 NC PIO0
PIO0
PIO0
10 11 12 13 14
10 11 12 13 14
PIOS/
PIOS/
SPI_SO
PIO0
PIO0
PIO1
PIO1
PIO1
PIO1
PIO1
PIO1 PIO1
SPI Bank
SPI_SI
SPI_
VCC
Lattice Semiconductor Corporation
PIOS/
SPI_SCK
PIO0
PIO1
PIO1
PIO1
PIO1
PIO1
PIO1
TCK
TDI
SPI_SS_B
PIOS/
VPP_
FAST
VCCIO_1
GBIN3/
GBIN2/
TRST_B
PIO1
PIO1
PIO1
PIO1
PIO1
PIO1
GND
PIO1
PIO1
VPP_
TDO
TMS
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