PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 83
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
PCI-MT32-XP-N1
Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet
1.PCI-MT32-O4-N2.pdf
(193 pages)
Specifications of PCI-MT32-XP-N1
Factory Pack Quantity
1
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Lattice Semiconductor
Functional Description
Figure 2-24. 32-bit Target Single Read Transaction with a 32-bit Local Interface
1
2
3
4
5
6
7
8
9
clk
framen
ad[31:0]
Address
Don’t care
Data 1
Bus
cben[3:0]
Byte Enable 1
Command
Address
Data
par
Don’t care
Parity
Parity 1
irdyn
trdyn
devseln
bar_hit[5:0]
0x00
0x01
0x00
lt_accessn
lt_r_nw
lt_rdyn
lt_data_xfern
l_ad_in[31:0]
Don’t care
Data 1
Don’t care
Don’t care
Byte Enable 1
Don’t care
lt_cben_out[3:0]
lt_address_out
Don’t care
Address
lt_command_out[3:0]
Don’t care
Bus Command
IPUG18_09.2, November 2010
83
PCI IP Core User’s Guide
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