PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 173

• Manufacturer Part Number: PCI-MT32-XP-N1
• Description: FPGA - Field Programmable Gate Array PCI Master/Target 32B
• Manufacturer: Lattice

Specifications of PCI-MT32-XP-N1

• Factory Pack Quantity: 1

Lattice Semiconductor
IPUG18_09.2, November 2010
Pin Assignment Considerations for MachXO Devices
PCI Pin Assignments for Target 33MHz 32-Bit Bus
The PCI Target 33MHz 32-bit core is optimized for LCMXO1200C-4FT256C. An example pin assignment, opti-
mized for best performance, is given in
ther information.
Table B-8. PCI Pin Assignments
Table B-7. PCI Pin Assignments (Continued)
PCI Interface Controls
PCI Interrupts
PCI System Pins
PCI Address and Data
Signal Name
Signal Name
cben(5)
cben(6)
cben(7)
Framen
devseln
ack64n
req64n
par64
stopn
Table
perrn
serrn
irdyn
trdyn
intan
idsel
ad(10)
ad(11)
par
ad(0)
ad(1)
ad(2)
ad(3)
ad(4)
ad(5)
ad(6)
ad(7)
ad(8)
ad(9)
rstn
clk
B-8. Refer to the readme file included with the core package for fur-
Pin/Bank
Pin/Bank
AB10 / 5
AB14 / 4
W14 / 4
AB9 / 5
AA9 / 5
AA7 / 5
U14 / 4
Y14 / 4
V14 / 4
V13 / 4
D10 / 1
C10 / 1
A10 / 1
W9 / 5
W6 / 5
M5 / 6
U8 / 5
Y9 / 5
V9 / 5
U9 / 5
G2 / 7
B9 / 1
D9 / 1
C9 / 1
A9 / 1
E9 / 1
D7 / 0
D8 / 0
C8 / 0
B8 / 0
173
LVCMOS33_IN
LVCMOS33_IN
Buffer Type
Buffer Type
PCI33_OUT
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_BIDI
PCI33_IN
Pin Assignments For Lattice FPGAs
PCI IP Core User’s Guide