PCI-MT32-XP-N1 Lattice, PCI-MT32-XP-N1 Datasheet - Page 106

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PCI-MT32-XP-N1

Manufacturer Part Number
PCI-MT32-XP-N1
Description
FPGA - Field Programmable Gate Array PCI Master/Target 32B
Manufacturer
Lattice
Datasheet

Specifications of PCI-MT32-XP-N1

Factory Pack Quantity
1
Lattice Semiconductor
IPUG18_09.2, November 2010
Figure 2-36. 64-bit Target Burst Read Transaction with a 64-bit Local Interface
lt_command_out[3:0]
lt_cben_out[3:0]
lt_cben_out[7:4]
lt_64bit_transn
lt_address_out
lt_hdata_xfern
l_ad_in[63:32]
lt_ldata_xfern
l_ad_in[31:0]
bar_hit[5:0]
lt_access
ad[63:32]
cben[3:0]
cben[7:4]
ad[31:0]
devseln
framen
ack64n
lt_r_nw
req64n
lt_rdyn
par64
trdyn
irdyn
par
clk
1
Don't care
Don't care
Don't care
Don't care
Command
Address
Bus
Don't care
Don't care
0x00
2
Don't care
Address
Parity
Don't care
Don't care
3
4
Don't care
Don't care
106
5
Byte Enable 1
Byte Enable 2
Don't care
Don't care
Data 1
Data 2
6
Bus Command
Byte Enable 1
Byte Enable 2
Address
Data 1
Data 2
Data 3
Data 4
0x01
7
Parity 1
Parity 2
Data 3
Data 4
Data 5
Data 6
Data
Data
8
Parity 3
Parity 4
Data 5
Data 6
Data
Data
9
Functional Description
Don't care
Don't care
Parity 5
Parity 6
Data
Data
10
PCI IP Core User’s Guide
Don't care
Don't care
0x00
11

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