XRT91L82ES Exar, XRT91L82ES Datasheet - Page 24

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XRT91L82ES

Manufacturer Part Number
XRT91L82ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L82ES

Product Category
Bus Transceivers
Rohs
yes
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
The SIPO is used to convert the 2.488/2.666 Gbps serial data input to 155.52/166.63 Mbps parallel data output
which can interface to a SONET Framer/ASIC. The SIPO bit de-interleaves the serial data input into a 16-bit
parallel output to RXDO[15:0]P/N. A simplified block diagram is shown in Figure 6.
F
The 16-bit LVDS, Differential LVPECL or Single-Ended LVPECL 155.52/166.63 Mbps parallel data output of
the receive path is used to interface to a SONET Framer/ASIC synchronized to the recovered clock. A
simplified block diagram is shown in Figure 7.
F
2.5
2.6
IGURE
IGURE
RXPCLKOP/N
RXDO15P/N
RXDO n+ P/N
6. S
7. R
RXDO0P/N
RXDO n P/N
Receive Serial Input to Parallel Output (SIPO)
Receive Parallel Output Interface
IMPLIFIED
ECEIVE
16-bit Parallel Data Output
P
ARALLEL
B
LOCK
b
b
b
b
15
n+
0
n
3
3
3
3
b
b
D
b
b
n+
15
0
n
O
2
2
2
2
IAGRAM OF
b
b
b
b
UTPUT
SONET Framer/ASIC
n+
15
0
n
1
1
1
1
b
b
b
b
n+
15
0
n
0
0
0
0
155.52/ 166.63 MHz
I
NTERFACE
SIPO
PRELIMINARY
B
16
LOCK
time (0)
b
15
21
3
RXDO[15:0]P/N
RXPCLKOP/N
b
14
3
b
13
3
b
12
DISRD
3
b
DISRDCLK
11
STS-48/STM-16
3 b
XRT91L82
Transceiver
10
3 b
2.488/2.666 Gbps
SDEXT
9
3
POLARITY
b
7
0 b
6
0 b
5
0 b
4
0
b
3
0 b
2
0 b
xr
xr
xr
xr
1
0 b
0
0
RXIP/N
REV. P1.0.5

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