XRT91L82ES Exar, XRT91L82ES Datasheet - Page 18

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XRT91L82ES

Manufacturer Part Number
XRT91L82ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L82ES

Product Category
Bus Transceivers
Rohs
yes
XRT91L82
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
JTAG
NO CONNECTS
S
IGNAL
N
None
AME
TRST
TMS
TDO
TCK
TDI
N
AME
L
N/A
EVEL
P
C7
D8
C8
D7
N3
IN
#
T
T
N/A
YPE
YPE
O
I
I
I
I
Test clock: Boundary Scan Clock Input.
This pin is provided with an internal pull-down.
Test Mode Select: Boundary Scan Mode Select Input.
JTAG is disabled by default.
Note: This input pin should be pulled “Low” for JTAG operation
This pin is provided with an internal pull-up.
Test Data In: Boundary Scan Test Data Input
This pin is provided with an internal pull-up.
Test Data Out: Boundary Scan Test Data Output
JTAG Test Reset Input
Note: This input pin should be pulled “Low” to reset JTAG
This pin is provided with an internal pull-up.
None
P
IN
PRELIMINARY
No Connect
This pin can be left floating or tied to ground.
15
D
ESCRIPTION
D
ESCRIPTION
xr
xr
xr
xr
REV. P1.0.5

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